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author | David S. Miller <davem@davemloft.net> | 2013-01-15 20:59:54 -0800 |
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committer | David S. Miller <davem@davemloft.net> | 2013-01-15 20:59:54 -0800 |
commit | c42d5e9862d9e62d2864d11f628b1e8b5be13ac2 (patch) | |
tree | 1810c25365032cc736e305172c07867f67691891 /sysdeps/sparc/sparc64/fpu | |
parent | c19a9f896c8ab28ad205e3ccf561ca8e9ebf426f (diff) | |
download | glibc-c42d5e9862d9e62d2864d11f628b1e8b5be13ac2.tar.gz glibc-c42d5e9862d9e62d2864d11f628b1e8b5be13ac2.tar.xz glibc-c42d5e9862d9e62d2864d11f628b1e8b5be13ac2.zip |
Optimize nearbyint{,f} on sparc.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: Add vis3 nearbyint{,f} to libm-sysdep_routes. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: New file. * sysdeps/sparc/sparc64/fpu/s_nearbyint.S: New file. * sysdeps/sparc/sparc64/fpu/s_nearbyintf.S: New file.
Diffstat (limited to 'sysdeps/sparc/sparc64/fpu')
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 2 | ||||
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S | 61 | ||||
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S | 12 | ||||
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S | 60 | ||||
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S | 12 | ||||
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/s_nearbyint.S | 63 | ||||
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/s_nearbyintf.S | 62 |
7 files changed, 271 insertions, 1 deletions
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index 7a5a9dd9cc..eff225ea4e 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -9,7 +9,7 @@ libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 s_ceilf-vis3 \ s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 \ s_rint-vis3 s_fminf-vis3 s_fmin-vis3 \ s_fmaxf-vis3 s_fmax-vis3 s_fmaf-vis3 \ - s_fma-vis3 + s_fma-vis3 s_nearbyint-vis3 s_nearbyintf-vis3 sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \ s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ s_isnanf-vis3 s_isnan-vis3 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S new file mode 100644 index 0000000000..f2071d66c3 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S @@ -0,0 +1,61 @@ +/* Round float to int floating-point values without generating + an inexact exception, sparc64 vis3 version. + + Copyright (C) 2013 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by David S. Miller <davem@davemloft.net>, 2013. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + /* We pop constants into the FPU registers using the incoming + argument stack slots, since this avoid having to use any PIC + references. We also thus avoid having to allocate a register + window. + + VIS instructions are used to facilitate the formation of + easier constants, and the propagation of the sign bit. */ + +#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ + +#define ZERO %f10 /* 0.0 */ +#define SIGN_BIT %f12 /* -0.0 */ + +ENTRY (__nearbyint_vis3) + stx %fsr, [%sp + STACK_BIAS + 144] + sethi %hi(TWO_FIFTYTWO), %o2 + sllx %o2, 32, %o2 + ldx [%sp + STACK_BIAS + 144], %o4 + sethi %hi(0xf8003e0), %o5 + fzero ZERO + or %o5, %lo(0xf8003e0), %o5 + fnegd ZERO, SIGN_BIT + andn %o4, %o5, %o4 + movxtod %o2, %f16 + stx %o4, [%sp + STACK_BIAS + 136] + ldx [%sp + STACK_BIAS + 136], %fsr + fabsd %f0, %f14 + fcmpd %fcc3, %f14, %f16 + fmovduge %fcc3, ZERO, %f16 + fand %f0, SIGN_BIT, SIGN_BIT + for %f16, SIGN_BIT, %f16 + faddd %f0, %f16, %f6 + fsubd %f6, %f16, %f0 + fabsd %f0, %f0 + for %f0, SIGN_BIT, %f0 + retl + ldx [%sp + STACK_BIAS + 144], %fsr +END (__nearbyint_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S new file mode 100644 index 0000000000..bb75ab3606 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S @@ -0,0 +1,12 @@ +#include <sparc-ifunc.h> + +SPARC_ASM_VIS3_IFUNC(nearbyint) + +weak_alias (__nearbyint, nearbyint) + +# undef weak_alias +# define weak_alias(a, b) + +#define __nearbyint __nearbyint_generic + +#include "../s_nearbyint.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S new file mode 100644 index 0000000000..b08928f6f3 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S @@ -0,0 +1,60 @@ +/* Round float to int floating-point values without generating + an inexact exception, sparc64 vis3 version. + + Copyright (C) 2013 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by David S. Miller <davem@davemloft.net>, 2013. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + /* We pop constants into the FPU registers using the incoming + argument stack slots, since this avoid having to use any PIC + references. We also thus avoid having to allocate a register + window. + + VIS instructions are used to facilitate the formation of + easier constants, and the propagation of the sign bit. */ + +#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ + +#define ZERO %f10 /* 0.0 */ +#define SIGN_BIT %f12 /* -0.0 */ + +ENTRY (__nearbyintf_vis3) + stx %fsr, [%sp + STACK_BIAS + 144] + sethi %hi(0xf8003e0), %o5 + sethi %hi(TWO_TWENTYTHREE), %o2 + ldx [%sp + STACK_BIAS + 144], %o4 + or %o5, %lo(0xf8003e0), %o5 + fzeros ZERO + andn %o4, %o5, %o4 + fnegs ZERO, SIGN_BIT + movwtos %o2, %f16 + stx %o4, [%sp + STACK_BIAS + 136] + ldx [%sp + STACK_BIAS + 136], %fsr + fabss %f1, %f14 + fcmps %fcc3, %f14, %f16 + fmovsuge %fcc3, ZERO, %f16 + fands %f1, SIGN_BIT, SIGN_BIT + fors %f16, SIGN_BIT, %f16 + fadds %f1, %f16, %f5 + fsubs %f5, %f16, %f0 + fabss %f0, %f0 + fors %f0, SIGN_BIT, %f0 + retl + ldx [%sp + STACK_BIAS + 144], %fsr +END (__nearbyintf_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S new file mode 100644 index 0000000000..95100c1bfc --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S @@ -0,0 +1,12 @@ +#include <sparc-ifunc.h> + +SPARC_ASM_VIS3_IFUNC(nearbyintf) + +weak_alias (__nearbyintf, nearbyintf) + +# undef weak_alias +# define weak_alias(a, b) + +#define __nearbyintf __nearbyintf_generic + +#include "../s_nearbyintf.S" diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S new file mode 100644 index 0000000000..963e4bc7b4 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S @@ -0,0 +1,63 @@ +/* Round float to int floating-point values without generating + an inexact exception, sparc64 version. + + Copyright (C) 2013 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by David S. Miller <davem@davemloft.net>, 2013. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + /* We pop constants into the FPU registers using the incoming + argument stack slots, since this avoid having to use any PIC + references. We also thus avoid having to allocate a register + window. + + VIS instructions are used to facilitate the formation of + easier constants, and the propagation of the sign bit. */ + +#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ + +#define ZERO %f10 /* 0.0 */ +#define SIGN_BIT %f12 /* -0.0 */ + +ENTRY (__nearbyint) + stx %fsr, [%sp + STACK_BIAS + 144] + sethi %hi(TWO_FIFTYTWO), %o2 + sllx %o2, 32, %o2 + ldx [%sp + STACK_BIAS + 144], %o4 + sethi %hi(0xf8003e0), %o5 + fzero ZERO + or %o5, %lo(0xf8003e0), %o5 + fnegd ZERO, SIGN_BIT + andn %o4, %o5, %o4 + stx %o2, [%sp + STACK_BIAS + 128] + stx %o4, [%sp + STACK_BIAS + 136] + ldx [%sp + STACK_BIAS + 136], %fsr + fabsd %f0, %f14 + ldd [%sp + STACK_BIAS + 128], %f16 + fcmpd %fcc3, %f14, %f16 + fmovduge %fcc3, ZERO, %f16 + fand %f0, SIGN_BIT, SIGN_BIT + for %f16, SIGN_BIT, %f16 + faddd %f0, %f16, %f6 + fsubd %f6, %f16, %f0 + fabsd %f0, %f0 + for %f0, SIGN_BIT, %f0 + retl + ldx [%sp + STACK_BIAS + 144], %fsr +END (__nearbyint) +weak_alias (__nearbyint, nearbyint) diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S new file mode 100644 index 0000000000..4ff29058eb --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S @@ -0,0 +1,62 @@ +/* Round float to int floating-point values without generating + an inexact exception, sparc64 version. + + Copyright (C) 2013 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by David S. Miller <davem@davemloft.net>, 2013. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + /* We pop constants into the FPU registers using the incoming + argument stack slots, since this avoid having to use any PIC + references. We also thus avoid having to allocate a register + window. + + VIS instructions are used to facilitate the formation of + easier constants, and the propagation of the sign bit. */ + +#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ + +#define ZERO %f10 /* 0.0 */ +#define SIGN_BIT %f12 /* -0.0 */ + +ENTRY (__nearbyintf) + stx %fsr, [%sp + STACK_BIAS + 144] + sethi %hi(0xf8003e0), %o5 + sethi %hi(TWO_TWENTYTHREE), %o2 + ldx [%sp + STACK_BIAS + 144], %o4 + or %o5, %lo(0xf8003e0), %o5 + fzeros ZERO + andn %o4, %o5, %o4 + fnegs ZERO, SIGN_BIT + st %o2, [%sp + STACK_BIAS + 128] + stx %o4, [%sp + STACK_BIAS + 136] + ldx [%sp + STACK_BIAS + 136], %fsr + fabss %f1, %f14 + ld [%sp + STACK_BIAS + 128], %f16 + fcmps %fcc3, %f14, %f16 + fmovsuge %fcc3, ZERO, %f16 + fands %f1, SIGN_BIT, SIGN_BIT + fors %f16, SIGN_BIT, %f16 + fadds %f1, %f16, %f5 + fsubs %f5, %f16, %f0 + fabss %f0, %f0 + fors %f0, SIGN_BIT, %f0 + retl + ldx [%sp + STACK_BIAS + 144], %fsr +END (__nearbyintf) +weak_alias (__nearbyintf, nearbyintf) |