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author | David S. Miller <davem@davemloft.net> | 2012-03-01 22:14:35 -0800 |
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committer | David S. Miller <davem@davemloft.net> | 2012-03-01 22:14:35 -0800 |
commit | 759707dee3a862e9e3935a8c20eaf93b2f1f01af (patch) | |
tree | 0a689a6466a4997d0f8ace8a9699214bd4545d96 /sysdeps/sparc/sparc64/fpu/s_isinff.S | |
parent | dfdb8ff2998cfcaf3c8978f522c061fe8a68fe68 (diff) | |
download | glibc-759707dee3a862e9e3935a8c20eaf93b2f1f01af.tar.gz glibc-759707dee3a862e9e3935a8c20eaf93b2f1f01af.tar.xz glibc-759707dee3a862e9e3935a8c20eaf93b2f1f01af.zip |
Optimized 64-bit sparc assembler for finite{,f} and isinf{,f}.
* sysdeps/sparc/sparc64/fpu/s_finite.S: New file. * sysdeps/sparc/sparc64/fpu/s_finitef.S: New file. * sysdeps/sparc/sparc64/fpu/s_isinf.S: New file. * sysdeps/sparc/sparc64/fpu/s_isinff.S: New file.
Diffstat (limited to 'sysdeps/sparc/sparc64/fpu/s_isinff.S')
-rw-r--r-- | sysdeps/sparc/sparc64/fpu/s_isinff.S | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/sysdeps/sparc/sparc64/fpu/s_isinff.S b/sysdeps/sparc/sparc64/fpu/s_isinff.S new file mode 100644 index 0000000000..302ff8dba5 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/s_isinff.S @@ -0,0 +1,33 @@ +/* isinff(). sparc64 version. + Copyright (C) 2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + +ENTRY (__isinff) + st %f1, [%sp + STACK_BIAS + 128] + sethi %hi(0x7f800000), %o2 + lduw [%sp + STACK_BIAS + 128], %g1 + sll %g1, 1, %o4 + srl %o4, 1, %o5 + sra %g1, 30, %o0 + xor %o5, %o2, %o3 + retl + movrne %o3, %g0, %o0 +END (__isinff) +hidden_def (__isinff) +weak_alias (__isinff, isinff) |