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authorPalmer Dabbelt <palmer@dabbelt.com>2018-01-29 09:27:10 -0800
committerPalmer Dabbelt <palmer@dabbelt.com>2018-01-29 10:26:43 -0800
commitb2cb5e0298e08b486190610a9e82356ccb6f564b (patch)
treec63e4d8b3e10d2df1af2424483a50f3ce7bee7a2 /sysdeps/riscv/rvf/fegetmode.c
parent67236aeb6e27bb6c975727f119e4b4f89e416706 (diff)
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RISC-V: Hard Float Support
This patch contains hardware floating-point support for the RISC-V ISA.
While we currently only support hard-float systems with both the F and D
extensions, I've left the F-specific code split out into seperate
folders in order to ease adding support for F-only and RV32I-based
systems in the future.  I gave this a quick once-over and believe I've
removed all the code that implements RV32IF, RV32IFD, and RV64IF
targets.

2018-01-29  Palmer Dabbelt  <palmer@sifive.com>

        * sysdeps/riscv/rv64/rvd/s_ceil.c: New file.
        * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_round.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise.
        * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise.
        * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise.
        * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise.
        * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise.
        * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise.
        * sysdeps/riscv/rvd/e_sqrt.c: Likewise.
        * sysdeps/riscv/rvd/s_copysign.c: Likewise.
        * sysdeps/riscv/rvd/s_finite.c: Likewise.
        * sysdeps/riscv/rvd/s_fma.c: Likewise.
        * sysdeps/riscv/rvd/s_fmax.c: Likewise.
        * sysdeps/riscv/rvd/s_fmin.c: Likewise.
        * sysdeps/riscv/rvd/s_fpclassify.c: Likewise.
        * sysdeps/riscv/rvd/s_isinf.c: Likewise.
        * sysdeps/riscv/rvd/s_isnan.c: Likewise.
        * sysdeps/riscv/rvd/s_issignaling.c: Likewise.
        * sysdeps/riscv/rvf/e_sqrtf.c: Likewise.
        * sysdeps/riscv/rvf/fclrexcpt.c: Likewise.
        * sysdeps/riscv/rvf/fegetenv.c: Likewise.
        * sysdeps/riscv/rvf/fegetmode.c: Likewise.
        * sysdeps/riscv/rvf/fegetround.c: Likewise.
        * sysdeps/riscv/rvf/feholdexcpt.c: Likewise.
        * sysdeps/riscv/rvf/fesetenv.c: Likewise.
        * sysdeps/riscv/rvf/fesetexcept.c: Likewise.
        * sysdeps/riscv/rvf/fesetmode.c: Likewise.
        * sysdeps/riscv/rvf/fesetround.c: Likewise.
        * sysdeps/riscv/rvf/feupdateenv.c: Likewise.
        * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise.
        * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise.
        * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise.
        * sysdeps/riscv/rvf/ftestexcept.c: Likewise.
        * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise.
        * sysdeps/riscv/rvf/math_private.h: Likewise.
        * sysdeps/riscv/rvf/s_ceilf.c: Likewise.
        * sysdeps/riscv/rvf/s_copysignf.c: Likewise.
        * sysdeps/riscv/rvf/s_finitef.c: Likewise.
        * sysdeps/riscv/rvf/s_floorf.c: Likewise.
        * sysdeps/riscv/rvf/s_fmaf.c: Likewise.
        * sysdeps/riscv/rvf/s_fmaxf.c: Likewise.
        * sysdeps/riscv/rvf/s_fminf.c: Likewise.
        * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise.
        * sysdeps/riscv/rvf/s_isinff.c: Likewise.
        * sysdeps/riscv/rvf/s_isnanf.c: Likewise.
        * sysdeps/riscv/rvf/s_issignalingf.c: Likewise.
        * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise.
        * sysdeps/riscv/rvf/s_rintf.c: Likewise.
        * sysdeps/riscv/rvf/s_roundevenf.c: Likewise.
        * sysdeps/riscv/rvf/s_roundf.c: Likewise.
        * sysdeps/riscv/rvf/s_truncf.c: Likewise.
Diffstat (limited to 'sysdeps/riscv/rvf/fegetmode.c')
-rw-r--r--sysdeps/riscv/rvf/fegetmode.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/sysdeps/riscv/rvf/fegetmode.c b/sysdeps/riscv/rvf/fegetmode.c
new file mode 100644
index 0000000000..67ae14c4ff
--- /dev/null
+++ b/sysdeps/riscv/rvf/fegetmode.c
@@ -0,0 +1,27 @@
+/* Store current floating-point control modes.  RISC-V version.
+   Copyright (C) 2017-2018 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fegetmode (femode_t *modep)
+{
+  _FPU_GETCW (*modep);
+  return 0;
+}