Update.

1998-11-17  Ulrich Drepper  <drepper@cygnus.com>

	* stdio-common/printf_fphex.c (__printf_fphex): Correct printing
	of denormalized numbers.

1998-10-06  Geoff Keating  <geoffk@ozemail.com.au>

	* sysdeps/powerpc/dl-machine.h (elf_machine_load_address): Suppress
	another parentheses warning, make nano-optimisation.

	* sysdeps/powerpc/dl-machine.h (_dl_runtime_resolve): Preserve
	saved LR on stack so _mcount works.
	(_dl_prof_resolve): Likewise.
	* sysdeps/powerpc/register-dump.h: Print FPRs.  Adjust for correct
	signal handler calling convention.
	* sysdeps/unix/sysv/linux/powerpc/sigcontextinfo.h: Adjust for
	correct signal handler calling convention---more like x86 linux and
	mklinux, less like linux-ppc versions between 2.1 and 2.1.126.

1998-11-17  Ulrich Drepper  <drepper@cygnus.com>

	* configure.in: Correct allowed makeinfo version.

1998-11-17  Philip Blundell  <pb@nexus.co.uk>

	* sysdeps/generic/bits/mathdef.h: Fix typo.

	* intl/locale.alias: Change `japanese' alias to match X11R6's.

2 files changed, 41 insertions, 31 deletions

diff --git a/sysdeps/powerpc/dl-machine.h b/sysdeps/powerpc/dl-machine.h
index ce6fcd02ab..6542b1d3b2 100644
--- a/sysdeps/powerpc/dl-machine.h
+++ b/sysdeps/powerpc/dl-machine.h
@@ -91,8 +91,7 @@ elf_machine_load_address (void)
   /* So now work out the difference between where the branch actually points,
      and the offset of that location in memory from the start of the file.  */
   return ((Elf32_Addr)branchaddr - *got
-	  + (*branchaddr & 0x3fffffc
-	     | (int)(*branchaddr << 6 & 0x80000000) >> 6));
+	  + ((int)(*branchaddr << 6 & 0xffffff00) >> 6));
 }
 
 #define ELF_MACHINE_BEFORE_RTLD_RELOC(dynamic_info) /* nothing */
@@ -111,7 +110,7 @@ elf_machine_load_address (void)
 _dl_runtime_resolve:
  # We need to save the registers used to pass parameters, and register 0,
  # which is used by _mcount; the registers are saved in a stack frame.
-	stwu 1,-48(1)
+	stwu 1,-64(1)
 	stw 0,12(1)
 	stw 3,16(1)
 	stw 4,20(1)
@@ -123,7 +122,7 @@ _dl_runtime_resolve:
 	mflr 0
  # We also need to save some of the condition register fields.
 	stw 7,32(1)
-	stw 0,52(1)
+	stw 0,48(1)
 	stw 8,36(1)
 	mfcr 0
 	stw 9,40(1)
@@ -133,7 +132,7 @@ _dl_runtime_resolve:
  # 'fixup' returns the address we want to branch to.
 	mtctr 3
  # Put the registers back...
-	lwz 0,52(1)
+	lwz 0,48(1)
 	lwz 10,44(1)
 	lwz 9,40(1)
 	mtlr 0
@@ -147,7 +146,7 @@ _dl_runtime_resolve:
 	lwz 3,16(1)
 	lwz 0,12(1)
  # ...unwind the stack frame, and jump to the PLT entry we updated.
-	addi 1,1,48
+	addi 1,1,64
 	bctr
 	.size	 _dl_runtime_resolve,.-_dl_runtime_resolve
 
@@ -157,7 +156,7 @@ _dl_runtime_resolve:
 _dl_prof_resolve:
  # We need to save the registers used to pass parameters, and register 0,
  # which is used by _mcount; the registers are saved in a stack frame.
-	stwu 1,-48(1)
+	stwu 1,-64(1)
         stw 0,12(1)
 	stw 3,16(1)
 	stw 4,20(1)
@@ -169,7 +168,7 @@ _dl_prof_resolve:
 	mflr 5
  # We also need to save some of the condition register fields.
 	stw 7,32(1)
-	stw 5,52(1)
+	stw 5,48(1)
 	stw 8,36(1)
 	mfcr 0
 	stw 9,40(1)
@@ -179,7 +178,7 @@ _dl_prof_resolve:
  # 'fixup' returns the address we want to branch to.
 	mtctr 3
  # Put the registers back...
-	lwz 0,52(1)
+	lwz 0,48(1)
 	lwz 10,44(1)
 	lwz 9,40(1)
 	mtlr 0
@@ -193,7 +192,7 @@ _dl_prof_resolve:
 	lwz 3,16(1)
         lwz 0,12(1)
  # ...unwind the stack frame, and jump to the PLT entry we updated.
-	addi 1,1,48
+	addi 1,1,64
 	bctr
 	.size	 _dl_prof_resolve,.-_dl_prof_resolve
  # Undo '.section text'.
diff --git a/sysdeps/powerpc/register-dump.h b/sysdeps/powerpc/register-dump.h
index 2e15c0bd71..f1d3985e32 100644
--- a/sysdeps/powerpc/register-dump.h
+++ b/sysdeps/powerpc/register-dump.h
@@ -21,16 +21,26 @@
 #include <stdio-common/_itoa.h>
 
 /* This prints out the information in the following form: */
-static const char dumpform[] =
-"Register dump:\n\
-r0 =0000000% sp =0000000% r2 =0000000% r3 =0000000% r4 =0000000% r5 =0000000%
-r6 =0000000% r7 =0000000% r8 =0000000% r9 =0000000% r10=0000000% r11=0000000%
-r12=0000000% r13=0000000% r14=0000000% r15=0000000% r16=0000000% r17=0000000%
-r18=0000000% r19=0000000% r20=0000000% r21=0000000% r22=0000000% r23=0000000%
-r24=0000000% r25=0000000% r26=0000000% r27=0000000% r28=0000000% r29=0000000%
-r30=0000000% r31=0000000% sr0=0000000% msr=0000000% r3*=0000000% ctr=0000000%
-lr =0000000% xer=0000000% ccr=0000000% sr1=0000000% trap=0000000%
-address of fault=0000000% dsisr=0000000%\n";
+static const char dumpform[] = "\
+Register dump:
+fp0-3:   0000030%0000031% 0000032%0000033% 0000034%0000035% 0000036%0000037%
+fp4-7:   0000038%0000039% 000003a%000003b% 000003c%000003d% 000003e%000003f%
+fp8-11:  0000040%0000041% 0000042%0000043% 0000044%0000045% 0000046%0000047%
+fp12-15: 0000048%0000049% 000004a%000004b% 000004c%000004d% 000004e%000004f%
+fp16-19: 0000050%0000051% 0000052%0000053% 0000054%0000055% 0000056%0000057%
+fp20-23: 0000058%0000059% 000005a%000005b% 000005c%000005d% 000005e%000005f%
+fp24-27: 0000060%0000061% 0000062%0000063% 0000064%0000065% 0000066%0000067%
+fp28-31: 0000068%0000069% 000006a%000006b% 000006c%000006d% 000006e%000006f%
+r0 =0000000% sp =0000001% r2 =0000002% r3 =0000003%  trap=0000028%
+r4 =0000004% r5 =0000005% r6 =0000006% r7 =0000007%   sr0=0000020% sr1=0000021%
+r8 =0000008% r9 =0000009% r10=000000a% r11=000000b%   dar=0000029% dsi=000002a%
+r12=000000c% r13=000000d% r14=000000e% r15=000000f%   r3*=0000022%
+r16=0000010% r17=0000011% r18=0000012% r19=0000013%
+r20=0000014% r21=0000015% r22=0000016% r23=0000017%    lr=0000024% xer=0000025%
+r24=0000018% r25=0000019% r26=000001a% r27=000001b%    mq=0000027% ctr=0000023%
+r28=000001c% r29=000001d% r30=000001e% r31=000001f%  fscr=0000071% ccr=0000026%
+";
+
 /* Most of the fields are self-explanatory.  'sr0' is the next
    instruction to execute, from SRR0, which may have some relationship
    with the instruction that caused the exception.  'r3*' is the value
@@ -66,8 +76,8 @@ address of fault=0000000% dsisr=0000000%\n";
    00C00 - System call exception (for instance, kill(3)).
    00E00 - FP assist exception (optional FP instructions, etc.)
 
-   'address of fault' is the memory location that wasn't mapped
-   (from the DAR). 'dsisr' has the following bits under trap 00300:
+   'dar' is the memory location, for traps 00300, 00400, 00600, 00A00.
+   'dsisr' has the following bits under trap 00300:
    0 - direct-store error exception
    1 - no page table entry for page
    4 - memory access not permitted
@@ -82,23 +92,24 @@ address of fault=0000000% dsisr=0000000%\n";
    the instruction without actually having to read it from memory.
 */
 
+#define xtoi(x) (x >= 'a' ? x + 10 - 'a' : x - '0')
+
 static void
-register_dump (int fd, void **ctx)
+register_dump (int fd, struct sigcontext *ctx)
 {
   char buffer[sizeof(dumpform)];
-  char *bufferpos = buffer;
-  int i = 0;
+  char *bufferpos;
+  unsigned regno;
+  unsigned *regs = (unsigned *)(ctx->regs);
 
   memcpy(buffer, dumpform, sizeof(dumpform));
 
-  ctx += 8;	/* FIXME!!!!  Why is this necessary?  Is it necessary?  */
-
   /* Generate the output.  */
-  while ((bufferpos = memchr (bufferpos, '%', sizeof(dumpform))))
+  while ((bufferpos = memchr (buffer, '%', sizeof(dumpform))))
     {
-      *bufferpos++ = '0';
-      _itoa_word ((unsigned long int)(ctx[i]), bufferpos, 16, 0);
-      i++;
+      regno = xtoi (bufferpos[-1]) | xtoi (bufferpos[-2]) << 4;
+      memset (bufferpos-2, '0', 3);
+      _itoa_word (regs[regno], bufferpos+1, 16, 0);
     }
 
   /* Write the output.  */