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| author | Torvald Riegel <triegel@redhat.com> | 2014-10-18 01:02:59 +0200 |
|---|---|---|
| committer | Torvald Riegel <triegel@redhat.com> | 2014-11-20 11:57:38 +0100 |
| commit | 1ea339b69725cb2f30b5a84cb7ca96111c9a637b (patch) | |
| tree | 130609da9190b04afb366f3a506d3415ea2f982f /sysdeps/powerpc | |
| parent | d960211ff52a6ab632eace2f905c4898f187df9e (diff) | |
| download | glibc-1ea339b69725cb2f30b5a84cb7ca96111c9a637b.tar.gz glibc-1ea339b69725cb2f30b5a84cb7ca96111c9a637b.tar.xz glibc-1ea339b69725cb2f30b5a84cb7ca96111c9a637b.zip | |
Add arch-specific configuration for C11 atomics support.
This sets __HAVE_64B_ATOMICS if provided. It also sets USE_ATOMIC_COMPILER_BUILTINS to true if the existing atomic ops use the __atomic* builtins (aarch64, mips partially) or if this has been tested (x86_64); otherwise, this is set to false so that C11 atomics will be based on the existing atomic operations.
Diffstat (limited to 'sysdeps/powerpc')
| -rw-r--r-- | sysdeps/powerpc/powerpc32/bits/atomic.h | 3 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/bits/atomic.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h index a3dd09cd9a..117b5a0775 100644 --- a/sysdeps/powerpc/powerpc32/bits/atomic.h +++ b/sysdeps/powerpc/powerpc32/bits/atomic.h @@ -33,6 +33,9 @@ # define MUTEX_HINT_REL #endif +#define __HAVE_64B_ATOMICS 0 +#define USE_ATOMIC_COMPILER_BUILTINS 0 + /* * The 32-bit exchange_bool is different on powerpc64 because the subf * does signed 64-bit arithmetic while the lwarx is 32-bit unsigned diff --git a/sysdeps/powerpc/powerpc64/bits/atomic.h b/sysdeps/powerpc/powerpc64/bits/atomic.h index ed26b7253e..5c4ebb6ad5 100644 --- a/sysdeps/powerpc/powerpc64/bits/atomic.h +++ b/sysdeps/powerpc/powerpc64/bits/atomic.h @@ -33,6 +33,9 @@ # define MUTEX_HINT_REL #endif +#define __HAVE_64B_ATOMICS 1 +#define USE_ATOMIC_COMPILER_BUILTINS 0 + /* The 32-bit exchange_bool is different on powerpc64 because the subf does signed 64-bit arithmetic while the lwarx is 32-bit unsigned (a load word and zero (high 32) form) load. |