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author | Alan Modra <amodra@gmail.com> | 2017-06-14 10:45:50 +0930 |
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committer | Alan Modra <amodra@gmail.com> | 2017-06-14 10:45:50 +0930 |
commit | d5b411854f0a3135c931921dfa8a33af395acfd3 (patch) | |
tree | 04684b753b01bf9a7aa79cd0fa51b3210d13b607 /sysdeps/powerpc/powerpc64/power8 | |
parent | de7ee73d6f5000478173ac065ded4077fd6ddee2 (diff) | |
download | glibc-d5b411854f0a3135c931921dfa8a33af395acfd3.tar.gz glibc-d5b411854f0a3135c931921dfa8a33af395acfd3.tar.xz glibc-d5b411854f0a3135c931921dfa8a33af395acfd3.zip |
PowerPC64 ENTRY_TOCLESS
A number of functions in the sysdeps/powerpc/powerpc64/ tree don't use or change r2, yet declare a global entry that sets up r2. This patch fixes that problem, and consolidates the ENTRY and EALIGN macros. * sysdeps/powerpc/powerpc64/sysdep.h: Formatting. (NOPS, ENTRY_3): New macros. (ENTRY): Rewrite. (ENTRY_TOCLESS): Define. (EALIGN, EALIGN_W_0, EALIGN_W_1, EALIGN_W_2, EALIGN_W_4, EALIGN_W_5, EALIGN_W_6, EALIGN_W_7, EALIGN_W_8): Delete. * sysdeps/powerpc/powerpc64/a2/memcpy.S: Replace EALIGN with ENTRY. * sysdeps/powerpc/powerpc64/dl-trampoline.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcasestr.S: Likewise. * sysdeps/powerpc/powerpc64/addmul_1.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/powerpc64/cell/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc64/lshift.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/mul_1.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power7/add_n.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcasecmp.S (strcasecmp_l): Likewise. * sysdeps/powerpc/powerpc64/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strspn.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/ppc-mcount.S: Store LR earlier. Don't add nop when SHARED. * sysdeps/powerpc/powerpc64/start.S: Fix comment. * sysdeps/powerpc/powerpc64/multiarch/strrchr-power8.S (ENTRY): Don't define. (ENTRY_TOCLESS): Define. * sysdeps/powerpc/powerpc32/sysdep.h (ENTRY_TOCLESS): Define. * sysdeps/powerpc/fpu/s_fma.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/fpu/s_fmaf.S: Likewise.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/power8')
20 files changed, 25 insertions, 21 deletions
diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S b/sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S index 4c42926a74..d9433d88e4 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S @@ -55,7 +55,7 @@ float [fp1] expf (float [fp1] x) */ .machine power8 -EALIGN(__ieee754_expf, 4, 0) +ENTRY (__ieee754_expf, 4) addis DATA_OFFSET,r2,.Lanchor@toc@ha addi DATA_OFFSET,DATA_OFFSET,.Lanchor@toc@l diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S index 8dfa0076e0..d45496d3b3 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S @@ -39,7 +39,7 @@ float [fp1] cosf (float [fp1] x) */ .machine power8 -EALIGN(__cosf, 4, 0) +ENTRY (__cosf, 4) addis r9,r2,L(anchor)@toc@ha addi r9,r9,L(anchor)@toc@l diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S index fcdcb60293..80181b74f7 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S @@ -23,7 +23,7 @@ /* int [r3] __finite ([fp1] x) */ -EALIGN (__finite, 4, 0) +ENTRY_TOCLESS (__finite, 4) CALL_MCOUNT 0 MFVSRD_R3_V1 lis r9,0x8010 diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S index 32814e4525..01f57a8dbf 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S @@ -23,7 +23,7 @@ /* int [r3] __isinf([fp1] x) */ -EALIGN (__isinf, 4, 0) +ENTRY_TOCLESS (__isinf, 4) CALL_MCOUNT 0 MFVSRD_R3_V1 lis r9,0x7ff0 /* r9 = 0x7ff0 */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S index af52e502b7..87be552fe6 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S @@ -23,7 +23,7 @@ /* int [r3] __isnan([f1] x) */ -EALIGN (__isnan, 4, 0) +ENTRY_TOCLESS (__isnan, 4) CALL_MCOUNT 0 MFVSRD_R3_V1 lis r9,0x7ff0 diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S index aa180b6901..6980abcc4f 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S @@ -22,7 +22,7 @@ #define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* long long int[r3] __llrint (double x[fp1]) */ -ENTRY (__llrint) +ENTRY_TOCLESS (__llrint) CALL_MCOUNT 0 fctid fp1,fp1 MFVSRD_R3_V1 diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S index 043fc6a089..8bdc162752 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S @@ -24,7 +24,7 @@ /* long long [r3] llround (float x [fp1]) */ -ENTRY (__llround) +ENTRY_TOCLESS (__llround) CALL_MCOUNT 0 frin fp1,fp1 /* Round to nearest +-0.5. */ fctidz fp1,fp1 /* Convert To Integer DW round toward 0. */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S index fb0add3462..d5335d8d57 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S @@ -39,7 +39,7 @@ float [fp1] sinf (float [fp1] x) */ .machine power8 -EALIGN(__sinf, 4, 0) +ENTRY (__sinf, 4) addis r9,r2,L(anchor)@toc@ha addi r9,r9,L(anchor)@toc@l diff --git a/sysdeps/powerpc/powerpc64/power8/memcmp.S b/sysdeps/powerpc/powerpc64/power8/memcmp.S index 46b9c0067a..ba8cd13831 100644 --- a/sysdeps/powerpc/powerpc64/power8/memcmp.S +++ b/sysdeps/powerpc/powerpc64/power8/memcmp.S @@ -29,7 +29,7 @@ # define MEMCMP memcmp #endif .machine power7 -EALIGN (MEMCMP, 4, 0) +ENTRY_TOCLESS (MEMCMP, 4) CALL_MCOUNT 3 #define rRTN r3 diff --git a/sysdeps/powerpc/powerpc64/power8/memset.S b/sysdeps/powerpc/powerpc64/power8/memset.S index bc734c9f4f..7ad3bb1b00 100644 --- a/sysdeps/powerpc/powerpc64/power8/memset.S +++ b/sysdeps/powerpc/powerpc64/power8/memset.S @@ -31,7 +31,7 @@ handled by the define. It avoid breakage on binutils that does not support this machine specifier. */ .machine power7 -EALIGN (MEMSET, 5, 0) +ENTRY_TOCLESS (MEMSET, 5) CALL_MCOUNT 3 L(_memset): @@ -447,7 +447,7 @@ libc_hidden_builtin_def (memset) /* Copied from bzero.S to prevent the linker from inserting a stub between bzero and memset. */ -ENTRY (__bzero) +ENTRY_TOCLESS (__bzero) CALL_MCOUNT 3 mr r5,r4 li r4,0 diff --git a/sysdeps/powerpc/powerpc64/power8/strcasestr.S b/sysdeps/powerpc/powerpc64/power8/strcasestr.S index 6ac6572f3b..3f59cb0f68 100644 --- a/sysdeps/powerpc/powerpc64/power8/strcasestr.S +++ b/sysdeps/powerpc/powerpc64/power8/strcasestr.S @@ -85,7 +85,7 @@ /* TODO: change this to .machine power8 when the minimum required binutils allows it. */ .machine power7 -EALIGN (STRCASESTR, 4, 0) +ENTRY (STRCASESTR, 4) CALL_MCOUNT 2 mflr r0 /* Load link register LR to r0. */ std r31, -8(r1) /* Save callers register r31. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strchr.S b/sysdeps/powerpc/powerpc64/power8/strchr.S index e0c185c162..63f75330e0 100644 --- a/sysdeps/powerpc/powerpc64/power8/strchr.S +++ b/sysdeps/powerpc/powerpc64/power8/strchr.S @@ -44,7 +44,7 @@ /* TODO: change this to .machine power8 when the minimum required binutils allows it. */ .machine power7 -ENTRY (FUNC_NAME) +ENTRY_TOCLESS (FUNC_NAME) CALL_MCOUNT 2 dcbt 0,r3 clrrdi r8,r3,3 /* Align the address to doubleword boundary. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strcmp.S b/sysdeps/powerpc/powerpc64/power8/strcmp.S index 770484f1e1..ff19f7f64a 100644 --- a/sysdeps/powerpc/powerpc64/power8/strcmp.S +++ b/sysdeps/powerpc/powerpc64/power8/strcmp.S @@ -31,7 +31,7 @@ 64K as default, the page cross handling assumes minimum page size of 4k. */ -EALIGN (STRCMP, 4, 0) +ENTRY_TOCLESS (STRCMP, 4) li r0,0 /* Check if [s1]+16 or [s2]+16 will cross a 4K page boundary using diff --git a/sysdeps/powerpc/powerpc64/power8/strcpy.S b/sysdeps/powerpc/powerpc64/power8/strcpy.S index 7f2cee4b1b..13e7a0fcbc 100644 --- a/sysdeps/powerpc/powerpc64/power8/strcpy.S +++ b/sysdeps/powerpc/powerpc64/power8/strcpy.S @@ -48,7 +48,7 @@ 4k. */ .machine power7 -EALIGN (FUNC_NAME, 4, 0) +ENTRY_TOCLESS (FUNC_NAME, 4) li r0,0 /* Doubleword with null chars to use with cmpb. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strlen.S b/sysdeps/powerpc/powerpc64/power8/strlen.S index 8f4a1fc1dc..8fdb6f5cc1 100644 --- a/sysdeps/powerpc/powerpc64/power8/strlen.S +++ b/sysdeps/powerpc/powerpc64/power8/strlen.S @@ -36,7 +36,7 @@ /* TODO: change this to .machine power8 when the minimum required binutils allows it. */ .machine power7 -EALIGN (STRLEN, 4, 0) +ENTRY_TOCLESS (STRLEN, 4) CALL_MCOUNT 1 dcbt 0,r3 clrrdi r4,r3,3 /* Align the address to doubleword boundary. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strncmp.S b/sysdeps/powerpc/powerpc64/power8/strncmp.S index 3d8df90538..84bfcb1f1c 100644 --- a/sysdeps/powerpc/powerpc64/power8/strncmp.S +++ b/sysdeps/powerpc/powerpc64/power8/strncmp.S @@ -32,7 +32,7 @@ 4k. */ .machine power7 -EALIGN (STRNCMP, 4, 0) +ENTRY_TOCLESS (STRNCMP, 4) /* Check if size is 0. */ mr. r10,r5 beq cr0,L(ret0) diff --git a/sysdeps/powerpc/powerpc64/power8/strncpy.S b/sysdeps/powerpc/powerpc64/power8/strncpy.S index 552c5cc577..150290ae4a 100644 --- a/sysdeps/powerpc/powerpc64/power8/strncpy.S +++ b/sysdeps/powerpc/powerpc64/power8/strncpy.S @@ -61,7 +61,11 @@ 4k. */ .machine power7 -EALIGN (FUNC_NAME, 4, 0) +#ifdef MEMSET_is_local +ENTRY_TOCLESS (FUNC_NAME, 4) +#else +ENTRY (FUNC_NAME, 4) +#endif CALL_MCOUNT 3 /* Check if the [src]+15 will cross a 4K page by checking if the bit diff --git a/sysdeps/powerpc/powerpc64/power8/strnlen.S b/sysdeps/powerpc/powerpc64/power8/strnlen.S index 3eadbfb09e..07608ffa26 100644 --- a/sysdeps/powerpc/powerpc64/power8/strnlen.S +++ b/sysdeps/powerpc/powerpc64/power8/strnlen.S @@ -59,7 +59,7 @@ /* int [r3] strnlen (char *s [r3], size_t maxlen [r4]) */ /* TODO: change to power8 when minimum required binutils allows it. */ .machine power7 -ENTRY (__strnlen) +ENTRY_TOCLESS (__strnlen) CALL_MCOUNT 2 dcbt 0,r3 diff --git a/sysdeps/powerpc/powerpc64/power8/strrchr.S b/sysdeps/powerpc/powerpc64/power8/strrchr.S index 8eb74853c3..0ba61389a7 100644 --- a/sysdeps/powerpc/powerpc64/power8/strrchr.S +++ b/sysdeps/powerpc/powerpc64/power8/strrchr.S @@ -77,7 +77,7 @@ vsumsws v2, v2, v0; #endif /* !__LITTLE_ENDIAN__ */ .machine power7 -ENTRY (strrchr) +ENTRY_TOCLESS (strrchr) CALL_MCOUNT 2 dcbt 0,r3 clrrdi r8,r3,3 /* Align the address to doubleword boundary. */ diff --git a/sysdeps/powerpc/powerpc64/power8/strspn.S b/sysdeps/powerpc/powerpc64/power8/strspn.S index e9271898f2..dcd1df425c 100644 --- a/sysdeps/powerpc/powerpc64/power8/strspn.S +++ b/sysdeps/powerpc/powerpc64/power8/strspn.S @@ -68,7 +68,7 @@ /* This can be updated to power8 once the minimum version of binutils supports power8 and the above instructions. */ .machine power7 -EALIGN(STRSPN, 4, 0) +ENTRY_TOCLESS (STRSPN, 4) CALL_MCOUNT 2 /* Generate useful constants for later on. */ |