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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 09:46:46 -0600 |
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| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 12:58:33 -0600 |
| commit | cac626d60a863e48ab75417064984769e58c5719 (patch) | |
| tree | 72cfaf38f3f0ae48808e8a088526c12592dc2feb /sysdeps/powerpc/powerpc64/power8/fpu | |
| parent | 4393fc119c34e97519b9b7a4fc94066b283be452 (diff) | |
| download | glibc-cac626d60a863e48ab75417064984769e58c5719.tar.gz glibc-cac626d60a863e48ab75417064984769e58c5719.tar.xz glibc-cac626d60a863e48ab75417064984769e58c5719.zip | |
PowerPC: Optimized finite/finitef for POWER8
This patch add a optimized finite/finitef implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/power8/fpu')
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S | 56 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S | 1 |
2 files changed, 57 insertions, 0 deletions
diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S new file mode 100644 index 0000000000..8e5de271c6 --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S @@ -0,0 +1,56 @@ +/* isfinite(). PowerPC64/POWER8 version. + Copyright (C) 2014 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ + +/* int [r3] __finite ([fp1] x) */ + +EALIGN (__finite, 4, 0) + CALL_MCOUNT 0 + MFVSRD_R3_V1 + lis r9,0x8010 + clrldi r3,r3,1 /* r3 = r3 & 0x8000000000000000 */ + rldicr r9,r9,32,31 /* r9 = (r9 << 32) & 0xffffffff */ + add r3,r3,r9 + rldicl r3,r3,1,63 + blr +END (__finite) + +hidden_def (__finite) +weak_alias (__finite, finite) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__finite, __finitef) +hidden_def (__finitef) +weak_alias (__finitef, finitef) + +#ifdef IS_IN_libm +# if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0) +compat_symbol (libm, __finite, __finitel, GLIBC_2_0) +compat_symbol (libm, finite, finitel, GLIBC_2_0) +# endif +#else +# if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0) +compat_symbol (libc, __finite, __finitel, GLIBC_2_0); +compat_symbol (libc, finite, finitel, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S new file mode 100644 index 0000000000..54bd94176d --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S @@ -0,0 +1 @@ +/* This function uses the same code as s_finite.S. */ |