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author | Joseph Myers <joseph@codesourcery.com> | 2013-06-05 20:44:03 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2013-06-05 20:44:03 +0000 |
commit | 9c84384cc18ff589233628c193953ca8d7a39f5c (patch) | |
tree | 95d1f5aee409b208db7545d678012eeae9559fae /sysdeps/powerpc/powerpc64/power5 | |
parent | 5556231db2301917cd14a7450de4eba2368c9763 (diff) | |
download | glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.tar.gz glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.tar.xz glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.zip |
Remove trailing whitespace.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/power5')
-rw-r--r-- | sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S b/sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S index 3afec2b6b0..8319d6e176 100644 --- a/sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S +++ b/sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S @@ -21,13 +21,13 @@ /* int __isnan(x) */ .machine power5 -EALIGN (__isnan, 4, 0) +EALIGN (__isnan, 4, 0) CALL_MCOUNT 0 stfd fp1,-8(r1) /* copy FPR to GPR */ lis r0,0x7ff0 nop /* insure the following is in a different */ nop /* dispatch group */ - ld r4,-8(r1) + ld r4,-8(r1) sldi r0,r0,32 /* const long r0 0x7ff00000 00000000 */ clrldi r4,r4,1 /* x = fabs(x) */ cmpd cr7,r4,r0 /* if (fabs(x) <= inf) */ |