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authorUlrich Weigand <Ulrich.Weigand@de.ibm.com>2013-12-04 06:49:15 -0600
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>2013-12-04 07:41:38 -0600
commitd31beafa8e4ca69faa4cf362784796ef17299341 (patch)
treec19f21db80ede177c9205a7bb5749a5d3fdcda4c /sysdeps/powerpc/powerpc64/dl-trampoline.S
parentb525166bb93b060e1146f0263b76a9c1e7455b06 (diff)
downloadglibc-d31beafa8e4ca69faa4cf362784796ef17299341.tar.gz
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PowerPC64 ELFv2 ABI 1/6: Code refactoring
This is the first patch to support the new ELFv2 ABI in glibc.

As preparation, this patch simply refactors some of the powerpc64 assembler
code to move all code related to creating function descriptors (.opd section)
or using function descriptors (function pointer call) into a central place
in sysdep.h.

Note that most locations creating .opd entries were already using macros
in sysdep.h, this patch simply extends this to the remaining places.

No relevant change in generated code expected.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/dl-trampoline.S')
-rw-r--r--sysdeps/powerpc/powerpc64/dl-trampoline.S24
1 files changed, 6 insertions, 18 deletions
diff --git a/sysdeps/powerpc/powerpc64/dl-trampoline.S b/sysdeps/powerpc/powerpc64/dl-trampoline.S
index 4dde2763a3..bffc4cbab6 100644
--- a/sysdeps/powerpc/powerpc64/dl-trampoline.S
+++ b/sysdeps/powerpc/powerpc64/dl-trampoline.S
@@ -71,12 +71,8 @@ EALIGN(_dl_runtime_resolve, 4, 0)
 	ld	r5,INT_PARMS+16(r1)
 	ld	r4,INT_PARMS+8(r1)
 	mtcrf	0xFF,r0
-/* Load the target address, toc and static chain reg from the function
-   descriptor returned by fixup.  */
-	ld	r0,0(r3)
-	ld	r2,8(r3)
-	mtctr	r0
-	ld	r11,16(r3)
+/* Prepare for calling the function returned by fixup.  */
+	PPC64_LOAD_FUNCPTR r3
 	ld	r3,INT_PARMS+0(r1)
 /* Unwind the stack frame, and jump.  */
 	addi	r1,r1,FRAME_SIZE
@@ -322,13 +318,9 @@ L(restoreFXR):
 	ld	r5,INT_PARMS+16(r1)
 	ld	r4,INT_PARMS+8(r1)
 	mtcrf	0xFF,r0
-/* Load the target address, toc and static chain reg from the function
-   descriptor returned by fixup.  */
-	ld	r0,0(r3)
-	ld	r2,8(r3)
-	ld	r11,16(r3)
+/* Prepare for calling the function returned by fixup.  */
+	PPC64_LOAD_FUNCPTR r3
 	ld	r3,INT_PARMS+0(r1)
-	mtctr	r0
 /* Load the floating point registers.  */
 	lfd	fp1,FPR_PARMS+0(r1)
 	lfd	fp2,FPR_PARMS+8(r1)
@@ -386,14 +378,10 @@ L(restoreFXR2):
 	ld	r5,INT_PARMS+16(r1)
 	ld	r4,INT_PARMS+8(r1)
 	mtcrf	0xFF,r0
-/* Load the target address, toc and static chain reg from the function
-   descriptor returned by fixup.  */
-	ld	r0,0(r3)
+/* Prepare for calling the function returned by fixup.  */
 	std	r2,40(r1)
-	ld	r2,8(r3)
-	ld	r11,16(r3)
+	PPC64_LOAD_FUNCPTR r3
 	ld	r3,INT_PARMS+0(r1)
-	mtctr	r0
 /* Load the floating point registers.  */
 	lfd	fp1,FPR_PARMS+0(r1)
 	lfd	fp2,FPR_PARMS+8(r1)