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author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2017-12-11 17:39:42 -0200 |
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committer | Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> | 2017-12-11 17:39:42 -0200 |
commit | c9cd7b0ce5c52a3dac7347084651d7df0b39a6d0 (patch) | |
tree | 725d9e24e8a3c66866e2b8963928d4857f09b561 /sysdeps/powerpc/powerpc32 | |
parent | e70c6fee466d26af36a38270e451cbe3273a6660 (diff) | |
download | glibc-c9cd7b0ce5c52a3dac7347084651d7df0b39a6d0.tar.gz glibc-c9cd7b0ce5c52a3dac7347084651d7df0b39a6d0.tar.xz glibc-c9cd7b0ce5c52a3dac7347084651d7df0b39a6d0.zip |
powerpc: POWER8 memcpy optimization for cached memory
On POWER8, unaligned memory accesses to cached memory has little impact on performance as opposed to its ancestors. It is disabled by default and will only be available when the tunable glibc.tune.cached_memopt is set to 1. __memcpy_power8_cached __memcpy_power7 ============================================================ max-size=4096: 33325.70 ( 12.65%) 38153.00 max-size=8192: 32878.20 ( 11.17%) 37012.30 max-size=16384: 33782.20 ( 11.61%) 38219.20 max-size=32768: 33296.20 ( 11.30%) 37538.30 max-size=65536: 33765.60 ( 10.53%) 37738.40 * manual/tunables.texi (Hardware Capability Tunables): Document glibc.tune.cached_memopt. * sysdeps/powerpc/cpu-features.c: New file. * sysdeps/powerpc/cpu-features.h: New file. * sysdeps/powerpc/dl-procinfo.c [!IS_IN(ldconfig)]: Add _dl_powerpc_cpu_features. * sysdeps/powerpc/dl-tunables.list: New file. * sysdeps/powerpc/ldsodefs.h: Include cpu-features.h. * sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h (INIT_ARCH): Initialize use_aligned_memopt. * sysdeps/powerpc/powerpc64/dl-machine.h [defined(SHARED && IS_IN(rtld))]: Restrict dl_platform_init availability and initialize CPU features used by tunables. * sysdeps/powerpc/powerpc64/multiarch/Makefile (sysdep_routines): Add memcpy-power8-cached. * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c: Add __memcpy_power8_cached. * sysdeps/powerpc/powerpc64/multiarch/memcpy.c: Likewise. * sysdeps/powerpc/powerpc64/multiarch/memcpy-power8-cached.S: New file. Reviewed-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Diffstat (limited to 'sysdeps/powerpc/powerpc32')
-rw-r--r-- | sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h b/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h index f2e6a4b705..6038941a70 100644 --- a/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h +++ b/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h @@ -37,6 +37,8 @@ #define INIT_ARCH() \ unsigned long int hwcap = __GLRO(dl_hwcap); \ unsigned long int __attribute__((unused)) hwcap2 = __GLRO(dl_hwcap2); \ + bool __attribute__((unused)) use_cached_memopt = \ + GLRO(dl_powerpc_cpu_features).use_cached_memopt; \ if (hwcap & PPC_FEATURE_ARCH_2_06) \ hwcap |= PPC_FEATURE_ARCH_2_05 | \ PPC_FEATURE_POWER5_PLUS | \ |