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authorAndreas Schwab <aschwab@redhat.com>2009-06-24 11:36:57 -0700
committerUlrich Drepper <drepper@redhat.com>2009-06-24 11:36:57 -0700
commit3f241d758415e050269ebd9b3b909f3d007f89e5 (patch)
tree698953028081d32e152816ce6de08f9a57b051de /sysdeps/powerpc/powerpc32/power4
parent7a7c2c24654f7ab69b1cec72c329c8d73f0e4c04 (diff)
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Fix cfa offset for saved registers in PPC sqrt implementations.
Diffstat (limited to 'sysdeps/powerpc/powerpc32/power4')
-rw-r--r--sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S4
-rw-r--r--sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S4
2 files changed, 4 insertions, 4 deletions
diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S
index 6aef4e301b..95a0b3915d 100644
--- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S
+++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S
@@ -60,8 +60,8 @@ EALIGN (__sqrt, 5, 0)
 	fmr	fp12,fp2
 	stw	r0,20(r1)
 	stw	r30,8(r1)
-	cfi_offset(lr,20)
-	cfi_offset(r30,8)
+	cfi_offset(lr,20-16)
+	cfi_offset(r30,8-16)
 #ifdef SHARED
 # ifdef HAVE_ASM_PPC_REL16
 	bcl	20,31,.LCF1
diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S
index e5b8b9d565..c31555194b 100644
--- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S
+++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S
@@ -60,8 +60,8 @@ EALIGN (__sqrtf, 5, 0)
 	fmr	fp12,fp2
 	stw	r0,20(r1)
 	stw	r30,8(r1)
-	cfi_offset(lr,20)
-	cfi_offset(r30,8)
+	cfi_offset(lr,20-16)
+	cfi_offset(r30,8-16)
 #ifdef SHARED
 # ifdef HAVE_ASM_PPC_REL16
 	bcl	20,31,.LCF1