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| author | Anton Blanchard <anton@au1.ibm.com> | 2013-08-17 18:34:40 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2013-10-04 10:37:59 +0930 |
| commit | be1e5d311342e08ae1f8013342df27b7ded2c156 (patch) | |
| tree | ccf1ca254c3aa1392262c72de0b960eb1ec7ec21 /sysdeps/powerpc/jmpbuf-offsets.h | |
| parent | fef13a78ea30d4c26d6bab48d731ebe864ee31b0 (diff) | |
| download | glibc-be1e5d311342e08ae1f8013342df27b7ded2c156.tar.gz glibc-be1e5d311342e08ae1f8013342df27b7ded2c156.tar.xz glibc-be1e5d311342e08ae1f8013342df27b7ded2c156.zip | |
PowerPC LE setjmp/longjmp
http://sourceware.org/ml/libc-alpha/2013-08/msg00089.html Little-endian fixes for setjmp/longjmp. When writing these I noticed the setjmp code corrupts the non volatile VMX registers when using an unaligned buffer. Anton fixed this, and also simplified it quite a bit. The current code uses boilerplate for the case where we want to store 16 bytes to an unaligned address. For that we have to do a read/modify/write of two aligned 16 byte quantities. In our case we are storing a bunch of back to back data (consective VMX registers), and only the start and end of the region need the read/modify/write. [BZ #15723] * sysdeps/powerpc/jmpbuf-offsets.h: Comment fix. * sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S: Correct _dl_hwcap access for little-endian. * sysdeps/powerpc/powerpc32/fpu/setjmp-common.S: Likewise. Don't destroy vmx regs when saving unaligned. * sysdeps/powerpc/powerpc64/__longjmp-common.S: Correct CR load. * sysdeps/powerpc/powerpc64/setjmp-common.S: Likewise CR save. Don't destroy vmx regs when saving unaligned.
Diffstat (limited to 'sysdeps/powerpc/jmpbuf-offsets.h')
| -rw-r--r-- | sysdeps/powerpc/jmpbuf-offsets.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/sysdeps/powerpc/jmpbuf-offsets.h b/sysdeps/powerpc/jmpbuf-offsets.h index 64c658a588..f2116bd703 100644 --- a/sysdeps/powerpc/jmpbuf-offsets.h +++ b/sysdeps/powerpc/jmpbuf-offsets.h @@ -21,12 +21,10 @@ #define JB_LR 2 /* The address we will return to */ #if __WORDSIZE == 64 # define JB_GPRS 3 /* GPRs 14 through 31 are saved, 18*2 words total. */ -# define JB_CR 21 /* Condition code registers with the VRSAVE at */ - /* offset 172 (low half of the double word. */ +# define JB_CR 21 /* Shared dword with VRSAVE. CR word at offset 172. */ # define JB_FPRS 22 /* FPRs 14 through 31 are saved, 18*2 words total. */ # define JB_SIZE (64 * 8) /* As per PPC64-VMX ABI. */ -# define JB_VRSAVE 21 /* VRSAVE shares a double word with the CR at offset */ - /* 168 (high half of the double word). */ +# define JB_VRSAVE 21 /* Shared dword with CR. VRSAVE word at offset 168. */ # define JB_VRS 40 /* VRs 20 through 31 are saved, 12*4 words total. */ #else # define JB_GPRS 3 /* GPRs 14 through 31 are saved, 18 in total. */ |