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| author | Alan Modra <amodra@gmail.com> | 2013-08-17 18:31:05 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2013-10-04 10:35:21 +0930 |
| commit | 9c008155b7d5d1bd81d909497850a2ece28aec50 (patch) | |
| tree | 3664ecc19b6f7606511b75243a5ddd7fd3efafe0 /sysdeps/powerpc/fpu_control.h | |
| parent | da13146da10360436941e843834c90a9aef5fd7a (diff) | |
| download | glibc-9c008155b7d5d1bd81d909497850a2ece28aec50.tar.gz glibc-9c008155b7d5d1bd81d909497850a2ece28aec50.tar.xz glibc-9c008155b7d5d1bd81d909497850a2ece28aec50.zip | |
PowerPC floating point little-endian [11 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00202.html Another little-endian fix. * sysdeps/powerpc/fpu_control.h (_FPU_GETCW): Rewrite using 64-bit int/double union. (_FPU_SETCW): Likewise. * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise. (_SET_DI_FPSCR, _GET_SI_FPSCR, _SET_SI_FPSCR): Likewise.
Diffstat (limited to 'sysdeps/powerpc/fpu_control.h')
| -rw-r--r-- | sysdeps/powerpc/fpu_control.h | 32 |
1 files changed, 18 insertions, 14 deletions
diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h index c61a2e12cc..86e5ab16f9 100644 --- a/sysdeps/powerpc/fpu_control.h +++ b/sysdeps/powerpc/fpu_control.h @@ -93,22 +93,26 @@ extern fpu_control_t __fpu_control; # define _FPU_IEEE 0x000000f0 /* Type of the control word. */ -typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__))); +typedef unsigned int fpu_control_t; /* Macros for accessing the hardware control word. */ -# define _FPU_GETCW(cw) ( { \ - union { double __d; fpu_control_t __cw[2]; } \ - __tmp __attribute__ ((__aligned__(8))); \ - __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (__tmp.__d) : : "fr0"); \ - (cw) = __tmp.__cw[1]; \ - __tmp.__cw[1]; } ) -# define _FPU_SETCW(cw) { \ - union { double __d; fpu_control_t __cw[2]; } \ - __tmp __attribute__ ((__aligned__(8))); \ - __tmp.__cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \ - __tmp.__cw[1] = (cw); \ - __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (__tmp.__d) : "fr0"); \ -} +# define _FPU_GETCW(cw) \ + ({union { double __d; unsigned long long __ll; } __u; \ + register double __fr; \ + __asm__ ("mffs %0" : "=f" (__fr)); \ + __u.__d = __fr; \ + (cw) = (fpu_control_t) __u.__ll; \ + (fpu_control_t) __u.__ll; \ + }) + +# define _FPU_SETCW(cw) \ + { union { double __d; unsigned long long __ll; } __u; \ + register double __fr; \ + __u.__ll = 0xfff80000LL << 32; /* This is a QNaN. */ \ + __u.__ll |= (cw) & 0xffffffffLL; \ + __fr = __u.__d; \ + __asm__ ("mtfsf 255,%0" : : "f" (__fr)); \ + } /* Default control word set at startup. */ extern fpu_control_t __fpu_control; |