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| author | Manjunath Matti <mmatti@linux.ibm.com> | 2023-09-23 10:49:51 -0500 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2023-09-27 13:55:36 -0300 |
| commit | 4eac1825ed92e88c192abb436412d5fb84ddd854 (patch) | |
| tree | c10d2e6af5df5d050bdde4f085ba75f25f46b8e3 /sysdeps/powerpc/fpu | |
| parent | 551101e8240b7514fc646d1722f8b79c90362b8f (diff) | |
| download | glibc-4eac1825ed92e88c192abb436412d5fb84ddd854.tar.gz glibc-4eac1825ed92e88c192abb436412d5fb84ddd854.tar.xz glibc-4eac1825ed92e88c192abb436412d5fb84ddd854.zip | |
fegetenv_and_set_rn now uses the builtins provided by GCC.
On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the prologue get/save/set rounding mode operations for POWER9 and later by using 'mffscrn' where possible, this was introduced by commit f1c56cdff09f650ad721fae026eb6a3651631f3d. GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn which now returns the FPSCR fields in a double. This feature is available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined. GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds this feature. Changes are done to use __builtin_set_fpscr_rn instead of mffscrn or mffscrni in __fe_mffscrn(rn). Suggested-by: Carl Love <cel@us.ibm.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Diffstat (limited to 'sysdeps/powerpc/fpu')
| -rw-r--r-- | sysdeps/powerpc/fpu/fenv_libc.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index fa5e1c697e..a2a12d914b 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -68,6 +68,14 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; __fr; \ }) +/* Starting with GCC 14 __builtin_set_fpscr_rn can be used to return the + FPSCR fields as a double. This support is available + on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined. + To retain backward compatibility with older GCC, we still retain the + old inline assembly implementation.*/ +#ifdef __SET_FPSCR_RN_RETURNS_FPSCR__ +#define __fe_mffscrn(rn) __builtin_set_fpscr_rn (rn) +#else #define __fe_mffscrn(rn) \ ({register fenv_union_t __fr; \ if (__builtin_constant_p (rn)) \ @@ -83,6 +91,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; } \ __fr.fenv; \ }) +#endif /* Like fegetenv_control, but also sets the rounding mode. */ #ifdef _ARCH_PWR9 |