diff options
| author | Paul A. Clarke <pc@us.ibm.com> | 2021-10-19 09:49:12 -0500 |
|---|---|---|
| committer | Paul A. Clarke <pc@us.ibm.com> | 2021-11-03 09:17:28 -0500 |
| commit | 9fea0f1a2a6e4f7946505c358ab99ea3ab846274 (patch) | |
| tree | 2a3861a51a14782bfe652e4f4314b1d2f34d0957 /sysdeps/powerpc/fpu | |
| parent | d3bf2f5927d51258a51ac7fde04f4805f8ee294a (diff) | |
| download | glibc-9fea0f1a2a6e4f7946505c358ab99ea3ab846274.tar.gz glibc-9fea0f1a2a6e4f7946505c358ab99ea3ab846274.tar.xz glibc-9fea0f1a2a6e4f7946505c358ab99ea3ab846274.zip | |
[powerpc] Tighten contraints for asm constant parameters
There are a few places where only known numeric values are acceptable for `asm` parameters, yet the constraint "i" is used. "i" can include "symbolic constants whose values will be known only at assembly time or later." Use "n" instead of "i" where known numeric values are required. Suggested-by: Segher Boessenkool <segher@kernel.crashing.org> Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
Diffstat (limited to 'sysdeps/powerpc/fpu')
| -rw-r--r-- | sysdeps/powerpc/fpu/fenv_libc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index dc35b9dbe0..a04fb928ca 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -73,7 +73,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; if (__builtin_constant_p (rn)) \ __asm__ __volatile__ ( \ ".machine push; .machine \"power9\"; mffscrni %0,%1; .machine pop" \ - : "=f" (__fr.fenv) : "i" (rn)); \ + : "=f" (__fr.fenv) : "n" (rn)); \ else \ { \ __fr.l = (rn); \ @@ -135,8 +135,8 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; /* Set/clear a particular FPSCR bit (for instance, reset_fpscr_bit(FPSCR_VE); prevents INVALID exceptions from being raised). */ -#define set_fpscr_bit(x) asm volatile ("mtfsb1 %0" : : "i"(x)) -#define reset_fpscr_bit(x) asm volatile ("mtfsb0 %0" : : "i"(x)) +#define set_fpscr_bit(x) asm volatile ("mtfsb1 %0" : : "n"(x)) +#define reset_fpscr_bit(x) asm volatile ("mtfsb0 %0" : : "n"(x)) typedef union { @@ -184,7 +184,7 @@ __fesetround_inline_nocheck (const int round) if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00)) __fe_mffscrn (round); else - asm volatile ("mtfsfi 7,%0" : : "i" (round)); + asm volatile ("mtfsfi 7,%0" : : "n" (round)); #endif } |