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author | Joseph Myers <joseph@codesourcery.com> | 2016-08-10 21:47:35 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2016-08-10 21:47:35 +0000 |
commit | f79211792127f38d5954419bb3784c8eb7f5e4e5 (patch) | |
tree | 157f46069f8b709e7257e7ec84fbca2a086139e3 /sysdeps/powerpc/fpu | |
parent | 5220a1aa8da8f9fc6163f67164d3889effb9621c (diff) | |
download | glibc-f79211792127f38d5954419bb3784c8eb7f5e4e5.tar.gz glibc-f79211792127f38d5954419bb3784c8eb7f5e4e5.tar.xz glibc-f79211792127f38d5954419bb3784c8eb7f5e4e5.zip |
Fix powerpc fesetexceptflag clearing FE_INVALID (bug 20455).
As shown by the test math/test-fexcept, the powerpc fesetexceptflag implementation fails to clear a previously set FE_INVALID flag, when that flag is clear in the saved exceptions and FE_INVALID is included in the mask of flags to restore, because it fails to mask out the sub-exceptions of FE_INVALID from the FPSCR state. This patch fixes the masking logic accordingly. Tested for powerpc. [BZ #20455] * sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Mask out all FE_INVALID sub-exceptions from FPSCR when FE_INVALID specified to be restored.
Diffstat (limited to 'sysdeps/powerpc/fpu')
-rw-r--r-- | sysdeps/powerpc/fpu/fsetexcptflg.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/sysdeps/powerpc/fpu/fsetexcptflg.c b/sysdeps/powerpc/fpu/fsetexcptflg.c index a06640593c..cb440d570d 100644 --- a/sysdeps/powerpc/fpu/fsetexcptflg.c +++ b/sysdeps/powerpc/fpu/fsetexcptflg.c @@ -31,7 +31,10 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) flag = *flagp & excepts; /* Replace the exception status */ - n.l = ((u.l & ~(FPSCR_STICKY_BITS & excepts)) + int excepts_mask = FPSCR_STICKY_BITS & excepts; + if ((excepts & FE_INVALID) != 0) + excepts_mask |= FE_ALL_INVALID; + n.l = ((u.l & ~excepts_mask) | (flag & FPSCR_STICKY_BITS) | (flag >> ((31 - FPSCR_VX) - (31 - FPSCR_VXSOFT)) & FE_INVALID_SOFTWARE)); |