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authorUlrich Drepper <drepper@redhat.com>2007-05-07 06:22:38 +0000
committerUlrich Drepper <drepper@redhat.com>2007-05-07 06:22:38 +0000
commit4a59e9adcb9e8475a00ea9088b26b74b48998dd0 (patch)
treebd8ca665d3df88463cb4e328510db9625f9df75c /sysdeps/powerpc/fpu/feupdateenv.c
parent15eca72044d2148b4fe7fe5a0f89ea12a87640fe (diff)
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2007-04-30 Steven Munroe <sjmunroe@us.ibm.com>
            Peter Bergner  <bergner@us.ibm.com>

	* sysdeps/powerpc/bits/fenv.h: Declare __fe_mask_env extern.
	Define FE_NOMASK_ENV as FE_EANBLED_ENV.  Define FE_MASK_ENV.
	* sysdeps/powerpc/fpu/Makefile: Add fe_mask to libm-support.
	* sysdeps/powerpc/fpu/fe_mask.c: New file.
	* sysdeps/powerpc/fpu/fe_nomask.c: Correct comment.
	* sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept):
	Call __fe_mask_env() if all FP exceptions disabled.
	* sysdeps/powerpc/fpu/feholdexcpt.c (feholdexcept): Copy high 32-bits
	from old FPSCR to new fenv to propagate DFP rounding modes.
	Call __fe_mask_env() if FP exceptions previously enabled.
	* sysdeps/powerpc/fpu/fesetenv.c (fesetenv): Change mask to merge
	exceptions from env.  Use __fe_nomask_env() or __fe_mask_env() when
	transitioning from all exceptions disabled to any exception enabled
	or visa versa.
	* sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Change mask to
	merge exceptions from env.  Call __fe_nomask_env or __fe_mask_env
	when transitioning from all exceptions disabled to any exception
	enabled or visa versa.
	* sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_nomask.c: Moved to...
	* sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_nomask.c: ...here.
	* sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_nomask.c: Moved to...
	* sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_nomask.c: ...here.
	* sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_mask.c: New file.
	* sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_mask.c: New file.
Diffstat (limited to 'sysdeps/powerpc/fpu/feupdateenv.c')
-rw-r--r--sysdeps/powerpc/fpu/feupdateenv.c22
1 files changed, 19 insertions, 3 deletions
diff --git a/sysdeps/powerpc/fpu/feupdateenv.c b/sysdeps/powerpc/fpu/feupdateenv.c
index 3a60d0f33d..5a4000f599 100644
--- a/sysdeps/powerpc/fpu/feupdateenv.c
+++ b/sysdeps/powerpc/fpu/feupdateenv.c
@@ -1,5 +1,5 @@
 /* Install given floating-point environment and raise exceptions.
-   Copyright (C) 1997,99,2000,01 Free Software Foundation, Inc.
+   Copyright (C) 1997,99,2000,01,07 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
    Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
 
@@ -30,8 +30,24 @@ __feupdateenv (const fenv_t *envp)
   new.fenv = *envp;
   old.fenv = fegetenv_register ();
 
-  /* Copy the set exceptions from `old' to `new'.  */
-  new.l[1] = (new.l[1] & 0xE00000FF) | (old.l[1] & 0x1FFFFF00);
+  /* Restore rounding mode and exception enable from *envp and merge
+     exceptions.  Leave fraction rounded/inexact and FP result/CC bits
+     unchanged.  */
+  new.l[1] = (old.l[1] & 0x1FFFFF00) | (new.l[1] & 0x1FF80FFF);
+  
+  /* If the old env has no eabled exceptions and the new env has any enabled
+     exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits.  This will put
+     the hardware into "precise mode" and may cause the FPU to run slower on
+     some hardware.  */
+  if ((old.l[1] & 0x000000F8) == 0 && (new.l[1] & 0x000000F8) != 0)
+    (void)__fe_nomask_env ();
+  
+  /* If the old env had any eabled exceptions and the new env has no enabled
+     exceptions, then mask SIGFPE in the MSR FE0/FE1 bits.  This may allow the
+     FPU to run faster because it always takes the default action and can not 
+     generate SIGFPE. */
+  if ((old.l[1] & 0x000000F8) != 0 && (new.l[1] & 0x000000F8) == 0)
+    (void)__fe_mask_env ();
 
   /* Atomically enable and raise (if appropriate) exceptions set in `new'. */
   fesetenv_register (new.fenv);