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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-04-28 14:38:24 -0500 |
|---|---|---|
| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-04-29 07:05:39 -0500 |
| commit | 18f2945ae9216cfcd53a162080a73e3d719de9e6 (patch) | |
| tree | 8d529fe01c41f0d3c6dd290aa69dbf4e5d6e083f /sysdeps/powerpc/fpu/fenv_libc.h | |
| parent | 5abebba403181de898bbea4ee1bcce5f088c663b (diff) | |
| download | glibc-18f2945ae9216cfcd53a162080a73e3d719de9e6.tar.gz glibc-18f2945ae9216cfcd53a162080a73e3d719de9e6.tar.xz glibc-18f2945ae9216cfcd53a162080a73e3d719de9e6.zip | |
PowerPC: Suppress unnecessary FPSCR write
This patch optimizes the FPSCR update on exception and rounding change functions by just updating its value if new value if different from current one. It also optimizes fedisableexcept and feenableexcept by removing an unecessary FPSCR read.
Diffstat (limited to 'sysdeps/powerpc/fpu/fenv_libc.h')
| -rw-r--r-- | sysdeps/powerpc/fpu/fenv_libc.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index 28e4d1f7c9..c1df5ce091 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -146,6 +146,23 @@ enum { /* the remaining two least-significant bits keep the rounding mode */ }; +static inline int +fenv_reg_to_exceptions (unsigned long long l) +{ + int result = 0; + if (l & (1 << (31 - FPSCR_XE))) + result |= FE_INEXACT; + if (l & (1 << (31 - FPSCR_ZE))) + result |= FE_DIVBYZERO; + if (l & (1 << (31 - FPSCR_UE))) + result |= FE_UNDERFLOW; + if (l & (1 << (31 - FPSCR_OE))) + result |= FE_OVERFLOW; + if (l & (1 << (31 - FPSCR_VE))) + result |= FE_INVALID; + return result; +} + #ifdef _ARCH_PWR6 /* Not supported in ISA 2.05. Provided for source compat only. */ # define FPSCR_NI 29 |