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| author | Paul A. Clarke <pc@us.ibm.com> | 2019-09-19 11:58:46 -0500 |
|---|---|---|
| committer | Paul A. Clarke <pc@us.ibm.com> | 2019-09-27 08:53:50 -0500 |
| commit | 81ecb0ee4970865cbe5d1da733c4879b999c528f (patch) | |
| tree | 7e74bf5638280f636a9231f0dcc9e0b427961c77 /sysdeps/powerpc/fpu/fenv_libc.h | |
| parent | e68b1151f7460d5fa88c3a567c13f66052da79a7 (diff) | |
| download | glibc-81ecb0ee4970865cbe5d1da733c4879b999c528f.tar.gz glibc-81ecb0ee4970865cbe5d1da733c4879b999c528f.tar.xz glibc-81ecb0ee4970865cbe5d1da733c4879b999c528f.zip | |
[powerpc] Rename fegetenv_status to fegetenv_control
fegetenv_status is used variously to retrieve the FPSCR exception enable bits, rounding mode bits, or both. These are referred to as the control bits in the POWER ISA. FPSCR status bits are also returned by the 'mffs' and 'mffsl' instructions, but they are uniformly ignored by all uses of fegetenv_status. Change the name to be reflective of its current and expected use. Reviewed-By: Paul E Murphy <murphyp@linux.ibm.com>
Diffstat (limited to 'sysdeps/powerpc/fpu/fenv_libc.h')
| -rw-r--r-- | sysdeps/powerpc/fpu/fenv_libc.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index 06bd9bad4c..17667d0a34 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -60,7 +60,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; 'mffs' on architectures older than "power9" because the additional bits set for 'mffsl' are "don't care" for 'mffs'. 'mffs' is a superset of 'mffsl'. */ -#define fegetenv_status() \ +#define fegetenv_control() \ ({register double __fr; \ __asm__ __volatile__ ( \ ".machine push; .machine \"power9\"; mffsl %0; .machine pop" \ @@ -84,7 +84,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; __fr.fenv; \ }) -/* Like fegetenv_status, but also sets the rounding mode. */ +/* Like fegetenv_control, but also sets the rounding mode. */ #ifdef _ARCH_PWR9 #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn) #else @@ -115,7 +115,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; /* Set the last 2 nibbles of the FPSCR, which contain the exception enables and the rounding mode. - 'fegetenv_status' retrieves these bits by reading the FPSCR. */ + 'fegetenv_control' retrieves these bits by reading the FPSCR. */ #define fesetenv_mode(env) __builtin_mtfsf (0b00000011, (env)); /* This very handy macro: |