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author | Ulrich Drepper <drepper@redhat.com> | 2007-05-07 06:22:38 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 2007-05-07 06:22:38 +0000 |
commit | 4a59e9adcb9e8475a00ea9088b26b74b48998dd0 (patch) | |
tree | bd8ca665d3df88463cb4e328510db9625f9df75c /sysdeps/powerpc/fpu/fe_mask.c | |
parent | 15eca72044d2148b4fe7fe5a0f89ea12a87640fe (diff) | |
download | glibc-4a59e9adcb9e8475a00ea9088b26b74b48998dd0.tar.gz glibc-4a59e9adcb9e8475a00ea9088b26b74b48998dd0.tar.xz glibc-4a59e9adcb9e8475a00ea9088b26b74b48998dd0.zip |
2007-04-30 Steven Munroe <sjmunroe@us.ibm.com>
Peter Bergner <bergner@us.ibm.com> * sysdeps/powerpc/bits/fenv.h: Declare __fe_mask_env extern. Define FE_NOMASK_ENV as FE_EANBLED_ENV. Define FE_MASK_ENV. * sysdeps/powerpc/fpu/Makefile: Add fe_mask to libm-support. * sysdeps/powerpc/fpu/fe_mask.c: New file. * sysdeps/powerpc/fpu/fe_nomask.c: Correct comment. * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Call __fe_mask_env() if all FP exceptions disabled. * sysdeps/powerpc/fpu/feholdexcpt.c (feholdexcept): Copy high 32-bits from old FPSCR to new fenv to propagate DFP rounding modes. Call __fe_mask_env() if FP exceptions previously enabled. * sysdeps/powerpc/fpu/fesetenv.c (fesetenv): Change mask to merge exceptions from env. Use __fe_nomask_env() or __fe_mask_env() when transitioning from all exceptions disabled to any exception enabled or visa versa. * sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Change mask to merge exceptions from env. Call __fe_nomask_env or __fe_mask_env when transitioning from all exceptions disabled to any exception enabled or visa versa. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_nomask.c: Moved to... * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_nomask.c: ...here. * sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_nomask.c: Moved to... * sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_nomask.c: ...here. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_mask.c: New file. * sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_mask.c: New file.
Diffstat (limited to 'sysdeps/powerpc/fpu/fe_mask.c')
-rw-r--r-- | sysdeps/powerpc/fpu/fe_mask.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/sysdeps/powerpc/fpu/fe_mask.c b/sysdeps/powerpc/fpu/fe_mask.c new file mode 100644 index 0000000000..d7ee5551ff --- /dev/null +++ b/sysdeps/powerpc/fpu/fe_mask.c @@ -0,0 +1,33 @@ +/* Procedure definition for FE_MASK_ENV. + Copyright (C) 2007 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <fenv.h> +#include <errno.h> + +/* This is a generic stub. An OS specific override is required to clear + the FE0/FE1 bits in the MSR. MSR update is privileged, so this will + normally involve a syscall. */ + +const fenv_t * +__fe_mask_env(void) +{ + __set_errno (ENOSYS); + return FE_DFL_ENV; +} +stub_warning (__fe_mask_env) |