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authorRyan S. Arnold <rsa@linux.vnet.ibm.com>2013-06-28 16:52:49 -0500
committerRyan S. Arnold <rsa@linux.vnet.ibm.com>2013-06-28 16:52:49 -0500
commit89cd956937f46e8f4a0374994965f991642dd408 (patch)
treefd9b8989857eeefe3a7573a3aa38d20c880eed55 /sysdeps/powerpc/bits
parent1ae8bfe07c1ab2444cc1d186321ff1431a1b9f96 (diff)
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PowerPC: Define AT_HWCAP2 bits and AT_HWCAP2 handling for POWER8.
Diffstat (limited to 'sysdeps/powerpc/bits')
-rw-r--r--sysdeps/powerpc/bits/hwcap.h23
1 files changed, 17 insertions, 6 deletions
diff --git a/sysdeps/powerpc/bits/hwcap.h b/sysdeps/powerpc/bits/hwcap.h
index 783138a0e6..0c02fc68e8 100644
--- a/sysdeps/powerpc/bits/hwcap.h
+++ b/sysdeps/powerpc/bits/hwcap.h
@@ -1,4 +1,4 @@
-/* Defines for bits in AT_HWCAP.
+/* Defines for bits in AT_HWCAP and AT_HWCAP2.
    Copyright (C) 2012-2013 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -20,9 +20,9 @@
 # error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
 #endif
 
-/*
- * The following must match the kernels asm/cputable.h.
- */
+/* The bit numbers must match those in the kernel's asm/cputable.h.  */
+
+/* Feature definitions in AT_HWCAP.  */
 #define PPC_FEATURE_32		    0x80000000 /* 32-bit mode. */
 #define PPC_FEATURE_64		    0x40000000 /* 64-bit mode. */
 #define PPC_FEATURE_601_INSTR	    0x20000000 /* 601 chip, Old POWER ISA.  */
@@ -39,8 +39,9 @@
 #define PPC_FEATURE_POWER5	    0x00040000 /* POWER5 ISA 2.02 */
 #define PPC_FEATURE_POWER5_PLUS	    0x00020000 /* POWER5+ ISA 2.03 */
 #define PPC_FEATURE_CELL_BE	    0x00010000 /* CELL Broadband Engine */
-#define PPC_FEATURE_BOOKE	    0x00008000
-#define PPC_FEATURE_SMT		    0x00004000 /* Simultaneous Multi-Threading */
+#define PPC_FEATURE_BOOKE	    0x00008000 /* ISA Category Embedded */
+#define PPC_FEATURE_SMT		    0x00004000 /* Simultaneous
+						  Multi-Threading */
 #define PPC_FEATURE_ICACHE_SNOOP    0x00002000
 #define PPC_FEATURE_ARCH_2_05	    0x00001000 /* ISA 2.05 */
 #define PPC_FEATURE_PA6T	    0x00000800 /* PA Semi 6T Core */
@@ -51,3 +52,13 @@
 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT  0x00000040
 #define PPC_FEATURE_TRUE_LE	    0x00000002
 #define PPC_FEATURE_PPC_LE	    0x00000001
+
+/* Feature definitions in AT_HWCAP2.  */
+#define PPC_FEATURE2_ARCH_2_07     0x80000000 /* ISA 2.07 */
+#define PPC_FEATURE2_HAS_HTM       0x40000000 /* Hardware Transactional
+						 Memory */
+#define PPC_FEATURE2_HAS_DSCR      0x20000000 /* Data Stream Control
+						 Register */
+#define PPC_FEATURE2_HAS_EBB       0x10000000 /* Event Base Branching */
+#define PPC_FEATURE2_HAS_ISEL      0x08000000 /* Integer Select */
+#define PPC_FEATURE2_HAS_TAR       0x04000000 /* Target Address Register */