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authorRoland McGrath <roland@gnu.org>2006-01-10 10:18:56 +0000
committerRoland McGrath <roland@gnu.org>2006-01-10 10:18:56 +0000
commitd5d55e016b21beb829a63afda7761cd4eaa12764 (patch)
tree423af6749643aa55e3b9abf6066ecbdfc620c360 /sysdeps/powerpc/bits/setjmp.h
parent0ca13e14122d9bfd4662e621d16e82325277886d (diff)
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* include/bits/setjmp.h: New file.
	* setjmp/jmpbuf-offsets.h: New file.
	* sysdeps/alpha/bits/setjmp.h: Move JB_* macros ...
	* sysdeps/alpha/jmpbuf-offsets.h: ... here, new file.
	* sysdeps/hppa/bits/setjmp.h (JB_SP): Macro moved ...
	* sysdeps/hppa/jmpbuf-offsets.h: ... here, new file.
	* sysdeps/i386/bits/setjmp.h: Move JB_* macros ...
	* sysdeps/i386/jmpbuf-offsets.h: ... here, new file.
	* sysdeps/mips/bits/setjmp.h (JB_PC): Macro removed.
	* sysdeps/powerpc/bits/setjmp.h: Move JB_* macros ...
	* sysdeps/powerpc/jmpbuf-offsets.h: ... here, new file.
	* sysdeps/s390/bits/setjmp.h: Remove __JB_* macros.
	* sysdeps/sh/bits/setjmp.h (JB_SIZE): Macro moved ...
	* sysdeps/sh/jmpbuf-offsets.h: ... here, new file.
	* sysdeps/sparc/sparc32/bits/setjmp.h: Move JB_* macros ...
	* sysdeps/sparc/sparc32/jmpbuf-offsets.h: ... here, new file.
	* sysdeps/unix/sysv/linux/sparc/bits/setjmp.h: Remove JB_* macros.
	* sysdeps/x86_64/bits/setjmp.h: Move JB_* macros ...
	* sysdeps/x86_64/jmpbuf-offsets.h: ... here, new file.
Diffstat (limited to 'sysdeps/powerpc/bits/setjmp.h')
-rw-r--r--sysdeps/powerpc/bits/setjmp.h24
1 files changed, 0 insertions, 24 deletions
diff --git a/sysdeps/powerpc/bits/setjmp.h b/sysdeps/powerpc/bits/setjmp.h
index 4221300540..9c3e22abac 100644
--- a/sysdeps/powerpc/bits/setjmp.h
+++ b/sysdeps/powerpc/bits/setjmp.h
@@ -32,30 +32,6 @@
 
 #include <bits/wordsize.h>
 
-#if defined __USE_MISC || defined _ASM
-# define JB_GPR1   0  /* Also known as the stack pointer */
-# define JB_GPR2   1
-# define JB_LR     2  /* The address we will return to */
-# if __WORDSIZE == 64
-#  define JB_GPRS   3  /* GPRs 14 through 31 are saved, 18*2 words total.  */
-#  define JB_CR     21 /* Condition code registers with the VRSAVE at */
-                       /* offset 172 (low half of the double word.  */
-#  define JB_FPRS   22 /* FPRs 14 through 31 are saved, 18*2 words total.  */
-#  define JB_SIZE   (64 * 8) /* As per PPC64-VMX ABI.  */
-#  define JB_VRSAVE 21 /* VRSAVE shares a double word with the CR at offset */
-                       /* 168 (high half of the double word).  */
-#  define JB_VRS    40 /* VRs 20 through 31 are saved, 12*4 words total.  */
-# else
-#  define JB_GPRS   3  /* GPRs 14 through 31 are saved, 18 in total.  */
-#  define JB_CR     21 /* Condition code registers.  */
-#  define JB_FPRS   22 /* FPRs 14 through 31 are saved, 18*2 words total.  */
-#  define JB_SIZE   ((64 + (12 * 4)) * 4)
-#  define JB_VRSAVE 62
-#  define JB_VRS    64
-# endif
-#endif
-
-
 /* The current powerpc 32-bit Altivec ABI specifies for SVR4 ABI and EABI
    the vrsave must be at byte 248 & v20 at byte 256.  So we must pad this
    correctly on 32 bit.  It also insists that vecregs are only gauranteed