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authorAlexandre Oliva <aoliva@redhat.com>2003-03-25 21:51:53 +0000
committerAlexandre Oliva <aoliva@redhat.com>2003-03-25 21:51:53 +0000
commit1b12060c5e8d99b8371513d7f4b7d3865ff1da89 (patch)
tree0444652cd9f9301d113cd4931541da1d4d72fbed /sysdeps/mips
parent09402f5bc1d87787c84dbf75d41777c87b1ce40e (diff)
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* sysdeps/mips/sgidefs.h (_MIPS_ISA_MIPS32, _MIPS_ISA_MIPS64): Define. * sysdeps/mips/sys/asm.h: Test _MIPS_ISA against them on all ISA tests. (ALSZ, ALMASK, SZREG, REG_S, REG_L): Define based on ABI, not ISA. (PTR_ADD, etc): Test _MIPS_SZPTR instead of _MIPS_SZLONG. * sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR to decide whether to add padding. * sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR to decide whether to add padding. * sysdeps/unix/sysv/linux/mips/kernel_sigaction.h (struct old_kernel_sigaction): Likewise.
2003-03-25  Alexandre Oliva  <aoliva@redhat.com>

	* sysdeps/mips/sgidefs.h (_MIPS_ISA_MIPS32, _MIPS_ISA_MIPS64):
	Define.
	* sysdeps/mips/sys/asm.h: Test _MIPS_ISA against them on all
	ISA tests.
	(ALSZ, ALMASK, SZREG, REG_S, REG_L): Define based on ABI, not ISA.
	(PTR_ADD, etc): Test _MIPS_SZPTR instead of _MIPS_SZLONG.
	* sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR
	to decide whether to add padding.
	* sysdeps/unix/sysv/linux/mips/bits/sigaction.h: Use _MIPS_SZPTR
	to decide whether to add padding.
	* sysdeps/unix/sysv/linux/mips/kernel_sigaction.h (struct
	old_kernel_sigaction): Likewise.
Diffstat (limited to 'sysdeps/mips')
-rw-r--r--sysdeps/mips/sgidefs.h4
-rw-r--r--sysdeps/mips/sys/asm.h29
2 files changed, 18 insertions, 15 deletions
diff --git a/sysdeps/mips/sgidefs.h b/sysdeps/mips/sgidefs.h
index 16b7c8ccc9..1d4893501e 100644
--- a/sysdeps/mips/sgidefs.h
+++ b/sysdeps/mips/sgidefs.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+/* Copyright (C) 1996, 1997, 1998, 2003 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
    Contributed by Ralf Baechle <ralf@gnu.org>.
 
@@ -28,6 +28,8 @@
 #define _MIPS_ISA_MIPS3 3
 #define _MIPS_ISA_MIPS4 4
 #define _MIPS_ISA_MIPS5 5
+#define _MIPS_ISA_MIPS32 6
+#define _MIPS_ISA_MIPS64 7
 
 /*
  * Subprogram calling convention
diff --git a/sysdeps/mips/sys/asm.h b/sysdeps/mips/sys/asm.h
index 0ebf561a15..76f6af3e15 100644
--- a/sysdeps/mips/sys/asm.h
+++ b/sysdeps/mips/sys/asm.h
@@ -230,7 +230,8 @@ symbol		=	value
  * MIPS IV implementations are free to treat this as a nop.  The R5000
  * is one of them.  So we should have an option not to use this instruction.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 # define PREF(hint,addr)                                 \
 		pref	hint,addr
 # define PREFX(hint,addr)                                \
@@ -275,7 +276,8 @@ symbol		=	value
 		.set	pop;				\
 9:
 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 # define MOVN(rd,rs,rt)					\
 		movn	rd,rs,rt
 # define MOVZ(rd,rs,rt)					\
@@ -285,20 +287,18 @@ symbol		=	value
 /*
  * Stack alignment
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
-# define ALSZ	7
-# define ALMASK	~7
-#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
 # define ALSZ	15
 # define ALMASK	~15
+#else
+# define ALSZ	7
+# define ALMASK	~7
 #endif
 
 /*
  * Size of a register
  */
-#ifdef __mips64
+#if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
 # define SZREG	8
 #else
 # define SZREG	4
@@ -308,7 +308,7 @@ symbol		=	value
  * Use the following macros in assemblercode to load/store registers,
  * pointers etc.
  */
-#if (_MIPS_SIM == _MIPS_SIM_ABI32)
+#if (SZREG == 4)
 # define REG_S sw
 # define REG_L lw
 #else
@@ -389,7 +389,7 @@ symbol		=	value
 /*
  * How to add/sub/load/store/shift pointers.
  */
-#if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZLONG == 32)
+#if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 32)
 # define PTR_ADD	add
 # define PTR_ADDI	addi
 # define PTR_ADDU	addu
@@ -433,7 +433,7 @@ symbol		=	value
 # define PTR_SCALESHIFT	2
 #endif
 
-#if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZLONG == 64) \
+#if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 64 /* o64??? */) \
     || _MIPS_SIM == _MIPS_SIM_ABI64
 # define PTR_ADD	dadd
 # define PTR_ADDI	daddi
@@ -459,12 +459,13 @@ symbol		=	value
 /*
  * Some cp0 registers were extended to 64bit for MIPS III.
  */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
+    (_MIPS_ISA == _MIPS_ISA_MIPS32)
 # define MFC0	mfc0
 # define MTC0	mtc0
 #endif
 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS5)
+    (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 # define MFC0	dmfc0
 # define MTC0	dmtc0
 #endif