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authorSteve Ellcey <sellcey@mips.com>2015-02-17 13:38:49 -0800
committerSteve Ellcey <sellcey@mips.com>2015-02-17 13:38:49 -0800
commite72ad0ef31a5be84c43cc826db97b8c74881faf4 (patch)
tree8453ad920994006a0d0f2634ae2bd5b4fd21b03a /sysdeps/mips
parent2caa4099dec36b2744b4a0e0fbf6a0ab41ebd9b3 (diff)
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2015-02-17 Steve Ellcey <sellcey@imgtec.com>
	* sysdeps/mips/memcpy.S: Move R6 PREFETCH_STORE_HINT check.
	* sysdeps/mips/memset.S: Ditto.
Diffstat (limited to 'sysdeps/mips')
-rw-r--r--sysdeps/mips/memcpy.S17
-rw-r--r--sysdeps/mips/memset.S15
2 files changed, 16 insertions, 16 deletions
diff --git a/sysdeps/mips/memcpy.S b/sysdeps/mips/memcpy.S
index a9ac059e14..c85935b811 100644
--- a/sysdeps/mips/memcpy.S
+++ b/sysdeps/mips/memcpy.S
@@ -50,15 +50,6 @@
 # endif
 #endif
 
-
-#if __mips_isa_rev > 5
-# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
-#  undef PREFETCH_STORE_HINT
-#  define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
-# endif
-# define R6_CODE
-#endif
-
 /* Some asm.h files do not have the L macro definition.  */
 #ifndef L
 # if _MIPS_SIM == _ABIO32
@@ -196,6 +187,14 @@
 # define PREFETCH_FOR_STORE(offset, reg)
 #endif
 
+#if __mips_isa_rev > 5
+# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+#  undef PREFETCH_STORE_HINT
+#  define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
+# endif
+# define R6_CODE
+#endif
+
 /* Allow the routine to be named something else if desired.  */
 #ifndef MEMCPY_NAME
 # define MEMCPY_NAME memcpy
diff --git a/sysdeps/mips/memset.S b/sysdeps/mips/memset.S
index cf16b2644a..864ab07c38 100644
--- a/sysdeps/mips/memset.S
+++ b/sysdeps/mips/memset.S
@@ -54,13 +54,6 @@
 # endif
 #endif
 
-#if __mips_isa_rev > 5
-# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
-#  undef PREFETCH_STORE_HINT
-#  define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
-# endif
-# define R6_CODE
-#endif
 
 /* Some asm.h files do not have the L macro definition.  */
 #ifndef L
@@ -159,6 +152,14 @@
 # define PREFETCH_FOR_STORE(offset, reg)
 #endif
 
+#if __mips_isa_rev > 5
+# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+#  undef PREFETCH_STORE_HINT
+#  define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
+# endif
+# define R6_CODE
+#endif
+
 /* Allow the routine to be named something else if desired.  */
 #ifndef MEMSET_NAME
 # define MEMSET_NAME memset