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author | Ulrich Drepper <drepper@redhat.com> | 1998-11-26 12:02:23 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 1998-11-26 12:02:23 +0000 |
commit | cb0509a8d5a3569117babe0a24dc4946cf6c06c1 (patch) | |
tree | 85cc83f80f4dff0f7a7b2580865f6341ad3e79ae /sysdeps/mips/sys/ucontext.h | |
parent | 0155a7737f5653e07015421b962b70fd8831c4ad (diff) | |
download | glibc-cb0509a8d5a3569117babe0a24dc4946cf6c06c1.tar.gz glibc-cb0509a8d5a3569117babe0a24dc4946cf6c06c1.tar.xz glibc-cb0509a8d5a3569117babe0a24dc4946cf6c06c1.zip |
Update.
1998-11-26 Ulrich Drepper <drepper@cygnus.com> * sysdeps/mips/dl-machine.h (ELF_MACHINE_NO_PLT): New defined macro. (elf_machine_got_rel): Remove scope variable. Use scope from the map. Don't modify _dl_global_scope_end in the end. (__dl_runtime_resolv): Also use scope from the map. * sysdeps/mips/mips64/dl-machine.h: Likewise. * elf/dl-runtime.c: Don't define fixup and profile_fixup if ELF_MACHINE_NO_PLT is defined. * sysdeps/mips/sys/ucontext.h: New file. Patches by kaz Kojima <kkojima@rr.iij4u.or.jp>. 1998-11-26 Andreas Jaeger <aj@arthur.rhein-neckar.de> * sysdeps/generic/pselect.c (__pselect): Change interface, set/restore sigmask. * misc/sys/select.h: Change declaration according to Stevens' Unix Network Programming. * include/sys/select.h (__pselect): Likewise. Reported by <bwelling@anomaly.munge.com> [PR libc/872]. * include/fpu_control.h: New file, contains __setfpucw declaration. * sysdeps/generic/fpu_control.h: Remove __setfpucw declaration, it's an internal symbol. * sysdeps/alpha/fpu/fpu_control.h: Likewise. * sysdeps/arm/fpu/fpu_control.h: Likewise. * sysdeps/i386/fpu_control.h: Likewise. * sysdeps/m68k/fpu_control.h: Likewise. * sysdeps/powerpc/fpu_control.h: Likewise. * sysdeps/sparc/sparc32/fpu/fpu_control.h: Likewise. * sysdeps/sparc/sparc64/fpu/fpu_control.h: Likewise.
Diffstat (limited to 'sysdeps/mips/sys/ucontext.h')
-rw-r--r-- | sysdeps/mips/sys/ucontext.h | 144 |
1 files changed, 144 insertions, 0 deletions
diff --git a/sysdeps/mips/sys/ucontext.h b/sysdeps/mips/sys/ucontext.h new file mode 100644 index 0000000000..f177cad121 --- /dev/null +++ b/sysdeps/mips/sys/ucontext.h @@ -0,0 +1,144 @@ +/* Copyright (C) 1998 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If not, + write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* System V/mips ABI compliant context switching support. */ + +#ifndef _SYS_UCONTEXT_H +#define _SYS_UCONTEXT_H 1 + +#include <features.h> +#include <signal.h> + +/* Type for general register. */ +typedef unsigned int greg_t; + +/* Number of general registers. */ +#define NGREG 36 + +/* Container for all general registers. */ +typedef greg_t gregset_t[NGREG]; + +/* Number of each register is the `gregset_t' array. */ +enum +{ + CTX_R0 = 0, +#define CTX_R0 CTX_R0 + CTX_AT = 1, +#define CTX_AT CTX_AT + CTX_V0 = 2, +#define CTX_V0 CTX_V0 + CTX_V1 = 3, +#define CTX_V1 CTX_V1 + CTX_A0 = 4, +#define CTX_A0 CTX_A0 + CTX_A1 = 5, +#define CTX_A1 CTX_A1 + CTX_A2 = 6, +#define CTX_A2 CTX_A2 + CTX_A3 = 7, +#define CTX_A3 CTX_A3 + CTX_T0 = 8, +#define CTX_T0 CTX_T0 + CTX_T1 = 9, +#define CTX_T1 CTX_T1 + CTX_T2 = 10, +#define CTX_T2 CTX_T2 + CTX_T3 = 11, +#define CTX_T3 CTX_T3 + CTX_T4 = 12, +#define CTX_T4 CTX_T4 + CTX_T5 = 13, +#define CTX_T5 CTX_T5 + CTX_T6 = 14, +#define CTX_T6 CTX_T6 + CTX_T7 = 15, +#define CTX_T7 CTX_T7 + CTX_S0 = 16, +#define CTX_S0 CTX_S0 + CTX_S1 = 17, +#define CTX_S1 CTX_S1 + CTX_S2 = 18, +#define CTX_S2 CTX_S2 + CTX_S3 = 19, +#define CTX_S3 CTX_S3 + CTX_S4 = 20, +#define CTX_S4 CTX_S4 + CTX_S5 = 21, +#define CTX_S5 CTX_S5 + CTX_S6 = 22, +#define CTX_S6 CTX_S6 + CTX_S7 = 23, +#define CTX_S7 CTX_S7 + CTX_T8 = 24, +#define CTX_T8 CTX_T8 + CTX_T9 = 25, +#define CTX_T9 CTX_T9 + CTX_K0 = 26, +#define CTX_K0 CTX_K0 + CTX_K1 = 27, +#define CTX_K1 CTX_K1 + CTX_GP = 28, +#define CTX_GP CTX_GP + CTX_SP = 29, +#define CTX_SP CTX_SP + CTX_S8 = 30, +#define CTX_S8 CTX_S8 + CTX_RA = 31, +#define CTX_RA CTX_RA + CTX_MDLO = 32, +#define CTX_MDLO CTX_MDLO + CTX_MDHI = 33, +#define CTX_MDHI CTX_MDHI + CTX_CAUSE = 34, +#define CTX_CAUSE CTX_CAUSE + CTX_EPC = 35, +#define CTX_EPC CTX_EPC +}; + +/* Structure to describe FPU registers. */ +typedef struct fpregset +{ + union + { + double fp_dregs[16]; + float fp_fregs[32]; + unsigned int fp_regs[32]; + } fp_r; + unsigned int fp_csr; + unsigned int fp_pad; +} fpregset_t; + +/* Context to describe whole processor state. */ +typedef struct +{ + gregset_t gpregs; + fpregset_t fpregs; +} mcontext_t; + +/* Userlevel context. */ +typedef struct ucontext +{ + unsigned long int uc_flags; + struct ucontext *uc_links; + __sigset_t uc_sigmask; + stack_t uc_stack; + mcontext_t uc_mcontext; + long int uc_filler[48]; +} ucontext_t; + +#endif /* sys/ucontext.h */ |