about summary refs log tree commit diff
path: root/sysdeps/mips/sys/regdef.h
diff options
context:
space:
mode:
authorAlexandre Oliva <aoliva@redhat.com>2003-04-09 02:51:04 +0000
committerAlexandre Oliva <aoliva@redhat.com>2003-04-09 02:51:04 +0000
commitc9efbeda6fa2b15aab04a51ec8adaf6089207550 (patch)
treede67577faaeb81a91674e9ccf9f940b7f7abe091 /sysdeps/mips/sys/regdef.h
parent9afe4964163b658f7271653f116f7570e826eda6 (diff)
downloadglibc-c9efbeda6fa2b15aab04a51ec8adaf6089207550.tar.gz
glibc-c9efbeda6fa2b15aab04a51ec8adaf6089207550.tar.xz
glibc-c9efbeda6fa2b15aab04a51ec8adaf6089207550.zip
* sysdeps/mips/sys/regdef.h (t4,t5,t6,t7): Renamed to t0..t3 on NewABI. (ta0, ta1, ta2, ta3): Defined to t4..t7 on o32, and a4..a7 on NewABI. * sysdeps/mips/mips64/memcpy.S: Adjust register naming conventions. * sysdeps/mips/mips64/memset.S: Likewise. * sysdeps/unix/mips/sysdep.S (__syscall_error) [_LIBC_REENTRANT]: Use t0 instead of t4 as temporary.
2003-04-08  Alexandre Oliva  <aoliva@redhat.com>

	* sysdeps/mips/sys/regdef.h (t4,t5,t6,t7): Renamed to t0..t3 on
	NewABI.
	(ta0, ta1, ta2, ta3): Defined to t4..t7 on o32, and a4..a7 on
	NewABI.
	* sysdeps/mips/mips64/memcpy.S: Adjust register naming
	conventions.
	* sysdeps/mips/mips64/memset.S: Likewise.
	* sysdeps/unix/mips/sysdep.S (__syscall_error) [_LIBC_REENTRANT]:
	Use t0 instead of t4 as temporary.
Diffstat (limited to 'sysdeps/mips/sys/regdef.h')
-rw-r--r--sysdeps/mips/sys/regdef.h22
1 files changed, 17 insertions, 5 deletions
diff --git a/sysdeps/mips/sys/regdef.h b/sysdeps/mips/sys/regdef.h
index f3a0df5ab4..9d2c4c1c4c 100644
--- a/sysdeps/mips/sys/regdef.h
+++ b/sysdeps/mips/sys/regdef.h
@@ -32,20 +32,32 @@
 #define a2      $6
 #define a3      $7
 #if _MIPS_SIM != _MIPS_SIM_ABI32
-#define a4	$8
-#define a5	$9
-#define a6	$10
-#define a7	$11
+#define a4      $8
+#define a5      $9
+#define a6      $10
+#define a7      $11
+#define t0      $12
+#define t1      $13
+#define t2      $14
+#define t3      $15
+#define ta0     a4
+#define ta1     a5
+#define ta2     a6
+#define ta3     a7
 #else /* if _MIPS_SIM == _MIPS_SIM_ABI32 */
 #define t0      $8      /* caller saved */
 #define t1      $9
 #define t2      $10
 #define t3      $11
-#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 #define t4      $12
 #define t5      $13
 #define t6      $14
 #define t7      $15
+#define ta0     t4
+#define ta1     t5
+#define ta2     t6
+#define ta3     t7
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 #define s0      $16     /* callee saved */
 #define s1      $17
 #define s2      $18