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authorJoseph Myers <joseph@codesourcery.com>2018-08-02 15:53:29 +0000
committerJoseph Myers <joseph@codesourcery.com>2018-08-02 15:53:29 +0000
commit506d7fb1d411c1ab0d786a5b858bd1d12217d0e4 (patch)
tree76df8820eeadf91eae002030800612dde0418d27 /sysdeps/mips/bits
parentf6dcefbe607e7c190388c11db0a80a80e6ce9686 (diff)
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Do not define various fenv.h macros for MIPS soft-float (bug 23479).
MIPS soft-float glibc does not support floating-point exceptions and
rounding modes, and uses a different ABI from hard-float so a
soft-float compilation cannot use a glibc that does support
floating-point exceptions and rounding modes.  Thus, bits/fenv.h
should not, when compiling for soft-float, define macros for the
unsupported features.

This patch changes it accordingly to define those macros only for
hard-float.  None of the exception macros are defined for soft-float,
with FE_ALL_EXCEPT defined to 0 in that case, and only FE_TONEAREST is
defined of the rounding-mode macros, and FE_NOMASK_ENV is not defined;
this is consistent with how architectures lacking exception and
rounding mode support generally define things in this header.  As well
as making the header more correct for this case, this also means the
generic math_private.h optimizations for this case automatically apply
(inlining libm-internal fenv.h function calls that are trivial when
exceptions and rounding modes are not supported).

The mips64 sfp-machine.h then needs similar changes to disable more of
the exception and rounding mode handling for soft-float.  (The mips32
sfp-machine.h is already used only for soft-float, has no integration
with hardware exceptions or rounding modes and so needs no changes.)

Existing binaries might use the old FE_NOMASK_ENV value as an argument
to fesetenv / feupdateenv and expect an error for it (given that it
was defined in a header that also defined FE_ALL_EXCEPT to a nonzero
value).  To preserve that error, wrappers for the fallback fesetenv
and feupdateenv are created in sysdeps/mips/nofpu/.

Tested for mips64 (hard-float and soft-float, all three ABIs).

	[BZ #23479]
	* sysdeps/mips/bits/fenv.h (FE_INEXACT): Define only if
	[__mips_hard_float].
	(FE_UNDERFLOW): Likewise.
	(FE_OVERFLOW): Likewise.
	(FE_DIVBYZERO): Likewise.
	(FE_INVALID): Likewise.
	(FE_ALL_EXCEPT): Define to 0 if [!__mips_hard_float].
	(FE_TOWARDZERO): Define only if [__mips_hard_float].
	(FE_UPWARD): Likewise.
	(FE_DOWNWARD): Likewise.
	(__FE_UNDEFINED): Define if [!__mips_hard_float]
	(FE_NOMASK_ENV): Define only if [__mips_hard_float].
	* sysdeps/mips/mips64/sfp-machine.h (_FP_DECL_EX): Define only if
	[__mips_hard_float].
	(FP_ROUNDMODE): Likewise.
	(FP_RND_NEAREST): Likewise.
	(FP_RND_ZERO): Likewise.
	(FP_RND_PINF): Likewise.
	(FP_RND_MINF): Likewise.
	(FP_EX_INVALID): Likewise.
	(FP_EX_OVERFLOW): Likewise.
	(FP_EX_UNDERFLOW): Likewise.
	(FP_EX_DIVZERO): Likewise.
	(FP_EX_INEXACT): Likewise.
	(FP_INIT_ROUNDMODE): Likewise.
	* sysdeps/mips/nofpu/fesetenv.c: New file.
	* sysdeps/mips/nofpu/feupdateenv.c: Likewise.
Diffstat (limited to 'sysdeps/mips/bits')
-rw-r--r--sysdeps/mips/bits/fenv.h42
1 files changed, 31 insertions, 11 deletions
diff --git a/sysdeps/mips/bits/fenv.h b/sysdeps/mips/bits/fenv.h
index 37d0a9e64d..767595d5a7 100644
--- a/sysdeps/mips/bits/fenv.h
+++ b/sysdeps/mips/bits/fenv.h
@@ -20,28 +20,30 @@
 #endif
 
 
+#ifdef __mips_hard_float
+
 /* Define bits representing the exception.  We use the bit positions
    of the appropriate bits in the FPU control word.  */
 enum
   {
     FE_INEXACT =
-#define FE_INEXACT	0x04
+# define FE_INEXACT	0x04
       FE_INEXACT,
     FE_UNDERFLOW =
-#define FE_UNDERFLOW	0x08
+# define FE_UNDERFLOW	0x08
       FE_UNDERFLOW,
     FE_OVERFLOW =
-#define FE_OVERFLOW	0x10
+# define FE_OVERFLOW	0x10
       FE_OVERFLOW,
     FE_DIVBYZERO =
-#define FE_DIVBYZERO	0x20
+# define FE_DIVBYZERO	0x20
       FE_DIVBYZERO,
     FE_INVALID =
-#define FE_INVALID	0x40
+# define FE_INVALID	0x40
       FE_INVALID,
   };
 
-#define FE_ALL_EXCEPT \
+# define FE_ALL_EXCEPT \
 	(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
 
 /* The MIPS FPU supports all of the four defined rounding modes.  We
@@ -50,19 +52,37 @@ enum
 enum
   {
     FE_TONEAREST =
-#define FE_TONEAREST	0x0
+# define FE_TONEAREST	0x0
       FE_TONEAREST,
     FE_TOWARDZERO =
-#define FE_TOWARDZERO	0x1
+# define FE_TOWARDZERO	0x1
       FE_TOWARDZERO,
     FE_UPWARD =
-#define FE_UPWARD	0x2
+# define FE_UPWARD	0x2
       FE_UPWARD,
     FE_DOWNWARD =
-#define FE_DOWNWARD	0x3
+# define FE_DOWNWARD	0x3
       FE_DOWNWARD
   };
 
+#else
+
+/* In the soft-float case, only rounding to nearest is supported, with
+   no exceptions.  */
+
+enum
+  {
+    __FE_UNDEFINED = -1,
+
+    FE_TONEAREST =
+# define FE_TONEAREST	0x0
+      FE_TONEAREST
+  };
+
+# define FE_ALL_EXCEPT 0
+
+#endif
+
 
 /* Type representing exception flags.  */
 typedef unsigned short int fexcept_t;
@@ -79,7 +99,7 @@ fenv_t;
 /* If the default argument is used we use this value.  */
 #define FE_DFL_ENV	((const fenv_t *) -1)
 
-#ifdef __USE_GNU
+#if defined __USE_GNU && defined __mips_hard_float
 /* Floating-point environment where none of the exception is masked.  */
 # define FE_NOMASK_ENV  ((const fenv_t *) -2)
 #endif