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| author | Steve Ellcey <sellcey@mips.com> | 2014-12-19 14:39:18 -0800 |
|---|---|---|
| committer | Steve Ellcey <sellcey@mips.com> | 2014-12-19 14:39:18 -0800 |
| commit | 8b2800c0fb18f83d1ee8083d0a7ac15e0b011e73 (patch) | |
| tree | 883f5ead649507e76a7ecfab18bf7fa5f08d4cc6 /sysdeps/mips/addmul_1.S | |
| parent | 04d55561978eb59e36ced8fc1e8d87a72ef70072 (diff) | |
| download | glibc-8b2800c0fb18f83d1ee8083d0a7ac15e0b011e73.tar.gz glibc-8b2800c0fb18f83d1ee8083d0a7ac15e0b011e73.tar.xz glibc-8b2800c0fb18f83d1ee8083d0a7ac15e0b011e73.zip | |
2014-12-19 Steve Ellcey <sellcey@imgtec.com>
* sysdeps/mips/addmul_1.S (__mpn_addmul_1): Use mulu/muhu instead of multu on MIPSr6. * sysdeps/mips/mul_1.S (__mpn_mul_1): Ditto. * sysdeps/mips/submul_1.S (__mpn_submul_1): Ditto. * sysdeps/mips/mips64/addmul_1.S (__mpn_addmul_1): Ditto. * sysdeps/mips/mips64/mul_1.S (__mpn_mul_1): Ditto. * sysdeps/mips/mips64/submul_1.S (__mpn_submul_1): Ditto.
Diffstat (limited to 'sysdeps/mips/addmul_1.S')
| -rw-r--r-- | sysdeps/mips/addmul_1.S | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/sysdeps/mips/addmul_1.S b/sysdeps/mips/addmul_1.S index 2c4c34bb7c..084080e9a3 100644 --- a/sysdeps/mips/addmul_1.S +++ b/sysdeps/mips/addmul_1.S @@ -42,7 +42,12 @@ ENTRY (__mpn_addmul_1) /* warm up phase 1 */ addiu $5,$5,4 +#if __mips_isa_rev < 6 multu $8,$7 +#else + mulu $11,$8,$7 + muhu $12,$8,$7 +#endif addiu $6,$6,-1 beq $6,$0,L(LC0) @@ -53,11 +58,21 @@ ENTRY (__mpn_addmul_1) lw $8,0($5) /* load new s1 limb as early as possible */ L(Loop): lw $10,0($4) +#if __mips_isa_rev < 6 mflo $3 mfhi $9 +#else + move $3,$11 + move $9,$12 +#endif addiu $5,$5,4 addu $3,$3,$2 /* add old carry limb to low product limb */ +#if __mips_isa_rev < 6 multu $8,$7 +#else + mulu $11,$8,$7 + muhu $12,$8,$7 +#endif lw $8,0($5) /* load new s1 limb as early as possible */ addiu $6,$6,-1 /* decrement loop counter */ sltu $2,$3,$2 /* carry from previous addition -> $2 */ @@ -71,11 +86,21 @@ L(Loop): lw $10,0($4) /* cool down phase 1 */ L(LC1): lw $10,0($4) +#if __mips_isa_rev < 6 mflo $3 mfhi $9 +#else + move $3,$11 + move $9,$12 +#endif addu $3,$3,$2 sltu $2,$3,$2 +#if __mips_isa_rev < 6 multu $8,$7 +#else + mulu $11,$8,$7 + muhu $12,$8,$7 +#endif addu $3,$10,$3 sltu $10,$3,$10 addu $2,$2,$10 @@ -85,8 +110,13 @@ L(LC1): lw $10,0($4) /* cool down phase 0 */ L(LC0): lw $10,0($4) +#if __mips_isa_rev < 6 mflo $3 mfhi $9 +#else + move $3,$11 + move $9,$12 +#endif addu $3,$3,$2 sltu $2,$3,$2 addu $3,$10,$3 |