Move bits/atomic.h to atomic-machine.h (bug 14912).

It was noted in
<https://sourceware.org/ml/libc-alpha/2012-09/msg00305.html> that the
bits/*.h naming scheme should only be used for installed headers.
This patch renames bits/atomic.h to atomic-machine.h to follow that
convention.

This is the only change in this series that needs to change the
filename rather than simply removing a directory level (because both
atomic.h and bits/atomic.h exist at present).

Tested for x86_64 (testsuite, and that installed stripped shared
libraries are unchanged by the patch).

	[BZ #14912]
	* sysdeps/aarch64/bits/atomic.h: Move to ...
	* sysdeps/aarch64/atomic-machine.h: ...here.
	(_AARCH64_BITS_ATOMIC_H): Rename macro to
	_AARCH64_ATOMIC_MACHINE_H.
	* sysdeps/alpha/bits/atomic.h: Move to ...
	* sysdeps/alpha/atomic-machine.h: ...here.
	* sysdeps/arm/bits/atomic.h: Move to ...
	* sysdeps/arm/atomic-machine.h: ...here.  Update comments.
	* bits/atomic.h: Move to ...
	* sysdeps/generic/atomic-machine.h: ...here.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/i386/bits/atomic.h: Move to ...
	* sysdeps/i386/atomic-machine.h: ...here.
	* sysdeps/ia64/bits/atomic.h: Move to ...
	* sysdeps/ia64/atomic-machine.h: ...here.
	* sysdeps/m68k/coldfire/bits/atomic.h: Move to ...
	* sysdeps/m68k/coldfire/atomic-machine.h: ...here.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/m68k/m680x0/m68020/bits/atomic.h: Move to ...
	* sysdeps/m68k/m680x0/m68020/atomic-machine.h: ...here.
	* sysdeps/microblaze/bits/atomic.h: Move to ...
	* sysdeps/microblaze/atomic-machine.h: ...here.
	* sysdeps/mips/bits/atomic.h: Move to ...
	* sysdeps/mips/atomic-machine.h: ...here.
	(_MIPS_BITS_ATOMIC_H): Rename macro to _MIPS_ATOMIC_MACHINE_H.
	* sysdeps/powerpc/bits/atomic.h: Move to ...
	* sysdeps/powerpc/atomic-machine.h: ...here.  Update comments.
	* sysdeps/powerpc/powerpc32/bits/atomic.h: Move to ...
	* sysdeps/powerpc/powerpc32/atomic-machine.h: ...here.  Update
	comments.  Include <atomic-machine.h> instead of <bits/atomic.h>.
	* sysdeps/powerpc/powerpc64/bits/atomic.h: Move to ...
	* sysdeps/powerpc/powerpc64/atomic-machine.h: ...here.  Include
	<atomic-machine.h> instead of <bits/atomic.h>.
	* sysdeps/s390/bits/atomic.h: Move to ...
	* sysdeps/s390/atomic-machine.h: ...here.
	* sysdeps/sparc/sparc32/bits/atomic.h: Move to ...
	* sysdeps/sparc/sparc32/atomic-machine.h: ...here.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h: Move to ...
	* sysdeps/sparc/sparc32/sparcv9/atomic-machine.h: ...here.
	* sysdeps/sparc/sparc64/bits/atomic.h: Move to ...
	* sysdeps/sparc/sparc64/atomic-machine.h: ...here.
	* sysdeps/tile/bits/atomic.h: Move to ...
	* sysdeps/tile/atomic-machine.h: ...here.
	* sysdeps/tile/tilegx/bits/atomic.h: Move to ...
	* sysdeps/tile/tilegx/atomic-machine.h: ...here.  Include
	<sysdeps/tile/atomic-machine.h> instead of
	<sysdeps/tile/bits/atomic.h>.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/tile/tilepro/bits/atomic.h: Move to ...
	* sysdeps/tile/tilepro/atomic-machine.h: ...here.  Include
	<sysdeps/tile/atomic-machine.h> instead of
	<sysdeps/tile/bits/atomic.h>.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/unix/sysv/linux/arm/bits/atomic.h: Move to ...
	* sysdeps/unix/sysv/linux/arm/atomic-machine.h: ...here.  Include
	<sysdeps/arm/atomic-machine.h> instead of
	<sysdeps/arm/bits/atomic.h>.
	* sysdeps/unix/sysv/linux/hppa/bits/atomic.h: Move to ...
	* sysdeps/unix/sysv/linux/hppa/atomic-machine.h: ...here.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/unix/sysv/linux/m68k/coldfire/bits/atomic.h: Move to ...
	* sysdeps/unix/sysv/linux/m68k/coldfire/atomic-machine.h: ...here.
	(_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H.
	* sysdeps/unix/sysv/linux/nios2/bits/atomic.h: Move to ...
	* sysdeps/unix/sysv/linux/nios2/atomic-machine.h: ...here.
	(_NIOS2_BITS_ATOMIC_H): Rename macro to _NIOS2_ATOMIC_MACHINE_H.
	* sysdeps/unix/sysv/linux/sh/bits/atomic.h: Move to ...
	* sysdeps/unix/sysv/linux/sh/atomic-machine.h: ...here.
	* sysdeps/x86_64/bits/atomic.h: Move to ...
	* sysdeps/x86_64/atomic-machine.h: ...here.
	* include/atomic.h: Include <atomic-machine.h> instead of
	<bits/atomic.h>.

1 files changed, 272 insertions, 0 deletions

diff --git a/sysdeps/microblaze/atomic-machine.h b/sysdeps/microblaze/atomic-machine.h
new file mode 100644
index 0000000000..f1cbf43876
--- /dev/null
+++ b/sysdeps/microblaze/atomic-machine.h
@@ -0,0 +1,272 @@
+/* Copyright (C) 2003-2015 Free Software Foundation, Inc.
+
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdint.h>
+#include <sysdep.h>
+
+
+typedef int8_t atomic8_t;
+typedef uint8_t uatomic8_t;
+typedef int_fast8_t atomic_fast8_t;
+typedef uint_fast8_t uatomic_fast8_t;
+
+typedef int32_t atomic32_t;
+typedef uint32_t uatomic32_t;
+typedef int_fast32_t atomic_fast32_t;
+typedef uint_fast32_t uatomic_fast32_t;
+
+typedef intptr_t atomicptr_t;
+typedef uintptr_t uatomicptr_t;
+typedef intmax_t atomic_max_t;
+typedef uintmax_t uatomic_max_t;
+
+#define __HAVE_64B_ATOMICS 0
+#define USE_ATOMIC_COMPILER_BUILTINS 0
+
+
+/* Microblaze does not have byte and halfword forms of load and reserve and
+   store conditional. So for microblaze we stub out the 8- and 16-bit forms.  */
+#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval)            \
+  (abort (), 0)
+
+#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval)           \
+  (abort (), 0)
+
+#define __arch_compare_and_exchange_bool_8_rel(mem, newval, oldval)            \
+  (abort (), 0)
+
+#define __arch_compare_and_exchange_bool_16_rel(mem, newval, oldval)           \
+  (abort (), 0)
+
+#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval)            \
+  ({                                                                           \
+      __typeof (*(mem)) __tmp;                                                 \
+      __typeof (mem)  __memp = (mem);                                          \
+      int test;                                                                \
+      __asm __volatile (                                                       \
+                "   addc    r0, r0, r0;"                                       \
+                "1: lwx     %0, %3, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                "   cmp     %1, %0, %4;"                                       \
+                "   bnei    %1, 2f;"                                           \
+                "   swx     %5, %3, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                "2:"                                                           \
+                    : "=&r" (__tmp),                                           \
+                    "=&r" (test),                                              \
+                    "=m" (*__memp)                                             \
+                    : "r" (__memp),                                            \
+                    "r" (oldval),                                              \
+                    "r" (newval)                                               \
+                    : "cc", "memory");                                         \
+      __tmp;                                                                   \
+  })
+
+#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval)            \
+  (abort (), (__typeof (*mem)) 0)
+
+#define atomic_compare_and_exchange_val_acq(mem, newval, oldval)               \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*mem) == 4)                                                    \
+      __result = __arch_compare_and_exchange_val_32_acq (mem, newval, oldval); \
+    else if (sizeof (*mem) == 8)                                               \
+      __result = __arch_compare_and_exchange_val_64_acq (mem, newval, oldval); \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define atomic_compare_and_exchange_val_rel(mem, newval, oldval)               \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*mem) == 4)                                                    \
+      __result = __arch_compare_and_exchange_val_32_acq (mem, newval, oldval); \
+    else if (sizeof (*mem) == 8)                                               \
+      __result = __arch_compare_and_exchange_val_64_acq (mem, newval, oldval); \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define __arch_atomic_exchange_32_acq(mem, value)                              \
+  ({                                                                           \
+      __typeof (*(mem)) __tmp;                                                 \
+      __typeof (mem)  __memp = (mem);                                          \
+      int test;                                                                \
+      __asm __volatile (                                                       \
+                "   addc    r0, r0, r0;"                                       \
+                "1: lwx     %0, %4, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                "   swx     %3, %4, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                    : "=&r" (__tmp),                                           \
+                    "=&r" (test),                                              \
+                    "=m" (*__memp)                                             \
+                    : "r" (value),                                             \
+                    "r" (__memp)                                               \
+                    : "cc", "memory");                                         \
+      __tmp;                                                                   \
+  })
+
+#define __arch_atomic_exchange_64_acq(mem, newval)                             \
+  (abort (), (__typeof (*mem)) 0)
+
+#define atomic_exchange_acq(mem, value)                                        \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*mem) == 4)                                                    \
+      __result = __arch_atomic_exchange_32_acq (mem, value);                   \
+    else if (sizeof (*mem) == 8)                                               \
+      __result = __arch_atomic_exchange_64_acq (mem, value);                   \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define atomic_exchange_rel(mem, value)                                        \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*mem) == 4)                                                    \
+      __result = __arch_atomic_exchange_32_acq (mem, value);                   \
+    else if (sizeof (*mem) == 8)                                               \
+      __result = __arch_atomic_exchange_64_acq (mem, value);                   \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define __arch_atomic_exchange_and_add_32(mem, value)                          \
+  ({                                                                           \
+    __typeof (*(mem)) __tmp;                                                   \
+      __typeof (mem)  __memp = (mem);                                          \
+    int test;                                                                  \
+    __asm __volatile (                                                         \
+                "   addc    r0, r0, r0;"                                       \
+                "1: lwx     %0, %4, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                "   add     %1, %3, %0;"                                       \
+                "   swx     %1, %4, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                    : "=&r" (__tmp),                                           \
+                    "=&r" (test),                                              \
+                    "=m" (*__memp)                                             \
+                    : "r" (value),                                             \
+                    "r" (__memp)                                               \
+                    : "cc", "memory");                                         \
+    __tmp;                                                                     \
+  })
+
+#define __arch_atomic_exchange_and_add_64(mem, value)                          \
+  (abort (), (__typeof (*mem)) 0)
+
+#define atomic_exchange_and_add(mem, value)                                    \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*mem) == 4)                                                    \
+      __result = __arch_atomic_exchange_and_add_32 (mem, value);               \
+    else if (sizeof (*mem) == 8)                                               \
+      __result = __arch_atomic_exchange_and_add_64 (mem, value);               \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define __arch_atomic_increment_val_32(mem)                                    \
+  ({                                                                           \
+    __typeof (*(mem)) __val;                                                   \
+    int test;                                                                  \
+    __asm __volatile (                                                         \
+                "   addc    r0, r0, r0;"                                       \
+                "1: lwx     %0, %3, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                "   addi    %0, %0, 1;"                                        \
+                "   swx     %0, %3, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                    : "=&r" (__val),                                           \
+                    "=&r" (test),                                              \
+                    "=m" (*mem)                                                \
+                    : "r" (mem),                                               \
+                    "m" (*mem)                                                 \
+                    : "cc", "memory");                                         \
+    __val;                                                                     \
+  })
+
+#define __arch_atomic_increment_val_64(mem)                                    \
+  (abort (), (__typeof (*mem)) 0)
+
+#define atomic_increment_val(mem)                                              \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*(mem)) == 4)                                                  \
+      __result = __arch_atomic_increment_val_32 (mem);                         \
+    else if (sizeof (*(mem)) == 8)                                             \
+      __result = __arch_atomic_increment_val_64 (mem);                         \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define atomic_increment(mem) ({ atomic_increment_val (mem); (void) 0; })
+
+#define __arch_atomic_decrement_val_32(mem)                                    \
+  ({                                                                           \
+    __typeof (*(mem)) __val;                                                   \
+    int test;                                                                  \
+    __asm __volatile (                                                         \
+                "   addc    r0, r0, r0;"                                       \
+                "1: lwx     %0, %3, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                "   rsubi   %0, %0, 1;"                                        \
+                "   swx     %0, %3, r0;"                                       \
+                "   addic   %1, r0, 0;"                                        \
+                "   bnei    %1, 1b;"                                           \
+                    : "=&r" (__val),                                           \
+                    "=&r" (test),                                              \
+                    "=m" (*mem)                                                \
+                    : "r" (mem),                                               \
+                    "m" (*mem)                                                 \
+                    : "cc", "memory");                                         \
+    __val;                                                                     \
+  })
+
+#define __arch_atomic_decrement_val_64(mem)                                    \
+  (abort (), (__typeof (*mem)) 0)
+
+#define atomic_decrement_val(mem)                                              \
+  ({                                                                           \
+    __typeof (*(mem)) __result;                                                \
+    if (sizeof (*(mem)) == 4)                                                  \
+      __result = __arch_atomic_decrement_val_32 (mem);                         \
+    else if (sizeof (*(mem)) == 8)                                             \
+      __result = __arch_atomic_decrement_val_64 (mem);                         \
+    else                                                                       \
+       abort ();                                                               \
+    __result;                                                                  \
+  })
+
+#define atomic_decrement(mem) ({ atomic_decrement_val (mem); (void) 0; })