diff options
| author | caiyinyu <caiyinyu@loongson.cn> | 2022-08-17 08:17:39 +0800 |
|---|---|---|
| committer | caiyinyu <caiyinyu@loongson.cn> | 2022-08-30 11:45:22 +0800 |
| commit | fa9e095bbe9b624022ff77551e5998100bdc4b29 (patch) | |
| tree | 963c7748061a2eb81896b4acdd3c3f120843fb99 /sysdeps/loongarch/setjmp.S | |
| parent | 02ca25fef2785974011e9c5beecc99b900b69fd7 (diff) | |
| download | glibc-fa9e095bbe9b624022ff77551e5998100bdc4b29.tar.gz glibc-fa9e095bbe9b624022ff77551e5998100bdc4b29.tar.xz glibc-fa9e095bbe9b624022ff77551e5998100bdc4b29.zip | |
LoongArch: Fix ptr mangling/demangling features.
Diffstat (limited to 'sysdeps/loongarch/setjmp.S')
| -rw-r--r-- | sysdeps/loongarch/setjmp.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/loongarch/setjmp.S b/sysdeps/loongarch/setjmp.S index ec4ddc72da..298bb02a82 100644 --- a/sysdeps/loongarch/setjmp.S +++ b/sysdeps/loongarch/setjmp.S @@ -30,7 +30,7 @@ END (setjmp) ENTRY (__sigsetjmp) #ifdef PTR_MANGLE - PTR_MANGLE (t0, ra, t1, t2) + PTR_MANGLE (t0, ra, t1) REG_S t0, a0, 0*SZREG PTR_MANGLE2 (t0, sp, t1) REG_S t0, a0, 1*SZREG |