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| author | caiyinyu <caiyinyu@loongson.cn> | 2022-08-17 08:17:39 +0800 |
|---|---|---|
| committer | caiyinyu <caiyinyu@loongson.cn> | 2022-08-30 11:45:22 +0800 |
| commit | fa9e095bbe9b624022ff77551e5998100bdc4b29 (patch) | |
| tree | 963c7748061a2eb81896b4acdd3c3f120843fb99 /sysdeps/loongarch/__longjmp.S | |
| parent | 02ca25fef2785974011e9c5beecc99b900b69fd7 (diff) | |
| download | glibc-fa9e095bbe9b624022ff77551e5998100bdc4b29.tar.gz glibc-fa9e095bbe9b624022ff77551e5998100bdc4b29.tar.xz glibc-fa9e095bbe9b624022ff77551e5998100bdc4b29.zip | |
LoongArch: Fix ptr mangling/demangling features.
Diffstat (limited to 'sysdeps/loongarch/__longjmp.S')
| -rw-r--r-- | sysdeps/loongarch/__longjmp.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/loongarch/__longjmp.S b/sysdeps/loongarch/__longjmp.S index c2c5b56a80..4207376f5e 100644 --- a/sysdeps/loongarch/__longjmp.S +++ b/sysdeps/loongarch/__longjmp.S @@ -22,7 +22,7 @@ ENTRY (__longjmp) #ifdef PTR_MANGLE REG_L t0, a0, 0*SZREG - PTR_DEMANGLE (ra, t0, t1, t2) + PTR_DEMANGLE (ra, t0, t1) REG_L t0, a0, 1*SZREG PTR_DEMANGLE2 (sp, t0, t1) #else |