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| author | caiyinyu <caiyinyu@loongson.cn> | 2022-08-10 10:21:46 +0800 |
|---|---|---|
| committer | caiyinyu <caiyinyu@loongson.cn> | 2022-08-12 09:30:56 +0800 |
| commit | 1c9bc1b6e50293a1b7037a7bfbf835868a55baed (patch) | |
| tree | 33bcdaa52d913e1f09b959cba4eac20e6a11540f /sysdeps/loongarch/__longjmp.S | |
| parent | 12182ba18dabda791a4f63a11ee2e9d828f40f9b (diff) | |
| download | glibc-1c9bc1b6e50293a1b7037a7bfbf835868a55baed.tar.gz glibc-1c9bc1b6e50293a1b7037a7bfbf835868a55baed.tar.xz glibc-1c9bc1b6e50293a1b7037a7bfbf835868a55baed.zip | |
LoongArch: Add pointer mangling support.
Diffstat (limited to 'sysdeps/loongarch/__longjmp.S')
| -rw-r--r-- | sysdeps/loongarch/__longjmp.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sysdeps/loongarch/__longjmp.S b/sysdeps/loongarch/__longjmp.S index 37e7384413..c2c5b56a80 100644 --- a/sysdeps/loongarch/__longjmp.S +++ b/sysdeps/loongarch/__longjmp.S @@ -20,8 +20,15 @@ #include <sys/asm.h> ENTRY (__longjmp) +#ifdef PTR_MANGLE + REG_L t0, a0, 0*SZREG + PTR_DEMANGLE (ra, t0, t1, t2) + REG_L t0, a0, 1*SZREG + PTR_DEMANGLE2 (sp, t0, t1) +#else REG_L ra, a0, 0*SZREG REG_L sp, a0, 1*SZREG +#endif REG_L x, a0, 2*SZREG REG_L fp, a0, 3*SZREG REG_L s0, a0, 4*SZREG |