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author | Ulrich Drepper <drepper@redhat.com> | 2001-02-19 09:09:18 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 2001-02-19 09:09:18 +0000 |
commit | 8da2915d5dcfa51cb5f9e55f7716b49858c1d59d (patch) | |
tree | aa219472cc41fcb82789b12723628cb6a33cc774 /sysdeps/ia64/fpu/s_rintl.S | |
parent | e208f556cad11f729533385e46e4191fcc49aa0a (diff) | |
download | glibc-8da2915d5dcfa51cb5f9e55f7716b49858c1d59d.tar.gz glibc-8da2915d5dcfa51cb5f9e55f7716b49858c1d59d.tar.xz glibc-8da2915d5dcfa51cb5f9e55f7716b49858c1d59d.zip |
Update.
2001-02-19 Ulrich Drepper <drepper@redhat.com> * libio/iogetline.c: Move return until after last statement. * localedata/show-ucs-data.c: Don't show < > for better readability. * sysdeps/ia64/fpu/Dist: New file. * sysdeps/ia64/fpu/Makefile: New file. * sysdeps/ia64/fpu/Versions: New file. * sysdeps/ia64/fpu/e_acos.S: New file. * sysdeps/ia64/fpu/e_acosf.S: New file. * sysdeps/ia64/fpu/e_acosl.S: New file. * sysdeps/ia64/fpu/e_asin.S: New file. * sysdeps/ia64/fpu/e_asinf.S: New file. * sysdeps/ia64/fpu/e_asinl.S: New file. * sysdeps/ia64/fpu/e_atan2.S: New file. * sysdeps/ia64/fpu/e_atan2f.S: New file. * sysdeps/ia64/fpu/e_atan2l.c: New file. * sysdeps/ia64/fpu/e_cosh.S: New file. * sysdeps/ia64/fpu/e_coshf.S: New file. * sysdeps/ia64/fpu/e_coshl.S: New file. * sysdeps/ia64/fpu/e_exp.S: New file. * sysdeps/ia64/fpu/e_expf.S: New file. * sysdeps/ia64/fpu/e_expl.c: New file. * sysdeps/ia64/fpu/e_fmod.S: New file. * sysdeps/ia64/fpu/e_fmodf.S: New file. * sysdeps/ia64/fpu/e_fmodl.S: New file. * sysdeps/ia64/fpu/e_hypot.S: New file. * sysdeps/ia64/fpu/e_hypotf.S: New file. * sysdeps/ia64/fpu/e_hypotl.S: New file. * sysdeps/ia64/fpu/e_log.S: New file. * sysdeps/ia64/fpu/e_log10.c: New file. * sysdeps/ia64/fpu/e_log10f.c: New file. * sysdeps/ia64/fpu/e_log10l.c: New file. * sysdeps/ia64/fpu/e_logf.S: New file. * sysdeps/ia64/fpu/e_logl.c: New file. * sysdeps/ia64/fpu/e_pow.S: New file. * sysdeps/ia64/fpu/e_powf.S: New file. * sysdeps/ia64/fpu/e_powl.S: New file. * sysdeps/ia64/fpu/e_rem_pio2.c: New file. * sysdeps/ia64/fpu/e_rem_pio2f.c: New file. * sysdeps/ia64/fpu/e_remainder.S: New file. * sysdeps/ia64/fpu/e_remainderf.S: New file. * sysdeps/ia64/fpu/e_remainderl.S: New file. * sysdeps/ia64/fpu/e_scalb.S: New file. * sysdeps/ia64/fpu/e_scalbf.S: New file. * sysdeps/ia64/fpu/e_scalbl.S: New file. * sysdeps/ia64/fpu/e_sinh.S: New file. * sysdeps/ia64/fpu/e_sinhf.S: New file. * sysdeps/ia64/fpu/e_sinhl.S: New file. * sysdeps/ia64/fpu/e_sqrt.S: New file. * sysdeps/ia64/fpu/e_sqrtf.S: New file. * sysdeps/ia64/fpu/e_sqrtl.S: New file. * sysdeps/ia64/fpu/k_rem_pio2.c: New file. * sysdeps/ia64/fpu/k_rem_pio2f.c: New file. * sysdeps/ia64/fpu/k_rem_pio2l.c: New file. * sysdeps/ia64/fpu/libm_atan2_reg.S: New file. * sysdeps/ia64/fpu/libm_error.c: New file. * sysdeps/ia64/fpu/libm_frexp4.S: New file. * sysdeps/ia64/fpu/libm_frexp4f.S: New file. * sysdeps/ia64/fpu/libm_frexp4l.S: New file. * sysdeps/ia64/fpu/libm_reduce.S: New file. * sysdeps/ia64/fpu/libm_support.h: New file. * sysdeps/ia64/fpu/libm_tan.S: New file. * sysdeps/ia64/fpu/s_atan.S: New file. * sysdeps/ia64/fpu/s_atanf.S: New file. * sysdeps/ia64/fpu/s_atanl.S: New file. * sysdeps/ia64/fpu/s_cbrt.S: New file. * sysdeps/ia64/fpu/s_cbrtf.S: New file. * sysdeps/ia64/fpu/s_cbrtl.S: New file. * sysdeps/ia64/fpu/s_ceil.S: New file. * sysdeps/ia64/fpu/s_ceilf.S: New file. * sysdeps/ia64/fpu/s_ceill.S: New file. * sysdeps/ia64/fpu/s_cos.S: New file. * sysdeps/ia64/fpu/s_cosf.S: New file. * sysdeps/ia64/fpu/s_cosl.S: New file. * sysdeps/ia64/fpu/s_expm1.S: New file. * sysdeps/ia64/fpu/s_expm1f.S: New file. * sysdeps/ia64/fpu/s_expm1l.S: New file. * sysdeps/ia64/fpu/s_floor.S: New file. * sysdeps/ia64/fpu/s_floorf.S: New file. * sysdeps/ia64/fpu/s_floorl.S: New file. * sysdeps/ia64/fpu/s_frexp.c: New file. * sysdeps/ia64/fpu/s_frexpf.c: New file. * sysdeps/ia64/fpu/s_frexpl.c: New file. * sysdeps/ia64/fpu/s_ilogb.S: New file. * sysdeps/ia64/fpu/s_ilogbf.S: New file. * sysdeps/ia64/fpu/s_ilogbl.S: New file. * sysdeps/ia64/fpu/s_ldexp.S: New file. * sysdeps/ia64/fpu/s_ldexpf.S: New file. * sysdeps/ia64/fpu/s_ldexpl.S: New file. * sysdeps/ia64/fpu/s_log1p.S: New file. * sysdeps/ia64/fpu/s_log1pf.S: New file. * sysdeps/ia64/fpu/s_log1pl.S: New file. * sysdeps/ia64/fpu/s_logb.S: New file. * sysdeps/ia64/fpu/s_logbf.S: New file. * sysdeps/ia64/fpu/s_logbl.S: New file. * sysdeps/ia64/fpu/s_matherrf.c: New file. * sysdeps/ia64/fpu/s_matherrl.c: New file. * sysdeps/ia64/fpu/s_modf.S: New file. * sysdeps/ia64/fpu/s_modff.S: New file. * sysdeps/ia64/fpu/s_modfl.S: New file. * sysdeps/ia64/fpu/s_nearbyint.S: New file. * sysdeps/ia64/fpu/s_nearbyintf.S: New file. * sysdeps/ia64/fpu/s_nearbyintl.S: New file. * sysdeps/ia64/fpu/s_rint.S: New file. * sysdeps/ia64/fpu/s_rintf.S: New file. * sysdeps/ia64/fpu/s_rintl.S: New file. * sysdeps/ia64/fpu/s_round.S: New file. * sysdeps/ia64/fpu/s_roundf.S: New file. * sysdeps/ia64/fpu/s_roundl.S: New file. * sysdeps/ia64/fpu/s_scalbn.S: New file. * sysdeps/ia64/fpu/s_scalbnf.S: New file. * sysdeps/ia64/fpu/s_scalbnl.S: New file. * sysdeps/ia64/fpu/s_significand.S: New file. * sysdeps/ia64/fpu/s_significandf.S: New file. * sysdeps/ia64/fpu/s_significandl.S: New file. * sysdeps/ia64/fpu/s_sin.c: New file. * sysdeps/ia64/fpu/s_sincos.c: New file. * sysdeps/ia64/fpu/s_sincosf.c: New file. * sysdeps/ia64/fpu/s_sincosl.c: New file. * sysdeps/ia64/fpu/s_sinf.c: New file. * sysdeps/ia64/fpu/s_sinl.c: New file. * sysdeps/ia64/fpu/s_tan.S: New file. * sysdeps/ia64/fpu/s_tanf.S: New file. * sysdeps/ia64/fpu/s_tanl.S: New file. * sysdeps/ia64/fpu/s_trunc.S: New file. * sysdeps/ia64/fpu/s_truncf.S: New file. * sysdeps/ia64/fpu/s_truncl.S: New file. * sysdeps/ia64/fpu/w_acos.c: New file. * sysdeps/ia64/fpu/w_acosf.c: New file. * sysdeps/ia64/fpu/w_acosl.c: New file. * sysdeps/ia64/fpu/w_asin.c: New file. * sysdeps/ia64/fpu/w_asinf.c: New file. * sysdeps/ia64/fpu/w_asinl.c: New file. * sysdeps/ia64/fpu/w_atan2.c: New file. * sysdeps/ia64/fpu/w_atan2f.c: New file. * sysdeps/ia64/fpu/w_atan2l.c: New file. * sysdeps/ia64/fpu/w_cosh.c: New file. * sysdeps/ia64/fpu/w_coshf.c: New file. * sysdeps/ia64/fpu/w_coshl.c: New file. * sysdeps/ia64/fpu/w_exp.c: New file. * sysdeps/ia64/fpu/w_expf.c: New file. * sysdeps/ia64/fpu/w_fmod.c: New file. * sysdeps/ia64/fpu/w_fmodf.c: New file. * sysdeps/ia64/fpu/w_fmodl.c: New file. * sysdeps/ia64/fpu/w_hypot.c: New file. * sysdeps/ia64/fpu/w_hypotf.c: New file. * sysdeps/ia64/fpu/w_hypotl.c: New file. * sysdeps/ia64/fpu/w_log.c: New file. * sysdeps/ia64/fpu/w_log10.c: New file. * sysdeps/ia64/fpu/w_log10f.c: New file. * sysdeps/ia64/fpu/w_log10l.c: New file. * sysdeps/ia64/fpu/w_logf.c: New file. * sysdeps/ia64/fpu/w_logl.c: New file. * sysdeps/ia64/fpu/w_pow.c: New file. * sysdeps/ia64/fpu/w_powf.c: New file. * sysdeps/ia64/fpu/w_powl.c: New file. * sysdeps/ia64/fpu/w_remainder.c: New file. * sysdeps/ia64/fpu/w_remainderf.c: New file. * sysdeps/ia64/fpu/w_remainderl.c: New file. * sysdeps/ia64/fpu/w_scalb.c: New file. * sysdeps/ia64/fpu/w_scalbf.c: New file. * sysdeps/ia64/fpu/w_scalbl.c: New file. * sysdeps/ia64/fpu/w_sqrt.c: New file. * sysdeps/ia64/fpu/w_sqrtf.c: New file. * sysdeps/ia64/fpu/w_sqrtl.c: New file. * sysdeps/ia64/fpu/libm-test-ulps: Adjust for long double implementation. * sysdeps/ia64/fpu/bits/mathdef.h: Correct float_t and double_t types. Change FP_ILOGBNAN for new implementation. * Verions.def: Add 2.2.3 versions.
Diffstat (limited to 'sysdeps/ia64/fpu/s_rintl.S')
-rw-r--r-- | sysdeps/ia64/fpu/s_rintl.S | 239 |
1 files changed, 239 insertions, 0 deletions
diff --git a/sysdeps/ia64/fpu/s_rintl.S b/sysdeps/ia64/fpu/s_rintl.S new file mode 100644 index 0000000000..9bf7492d88 --- /dev/null +++ b/sysdeps/ia64/fpu/s_rintl.S @@ -0,0 +1,239 @@ +.file "rintl.s" + +// Copyright (c) 2000, 2001, Intel Corporation +// All rights reserved. +// +// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story, +// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// +// History +//============================================================== +// 2/02/00: Initial version +// 5/24/00 Fixed case of 2^63 - 1 + 0.5 (0x1007dffffffffffffffff) +// 2/08/01 Corrected behavior for all rounding modes. +// +// API +//============================================================== +// long double rintl(long double x) + +#include "libm_support.h" + +// +// general registers used: +// +rint_GR_FFFF = r14 +rint_GR_signexp = r15 +rint_GR_exponent = r16 +rint_GR_17ones = r17 +rint_GR_10033 = r18 +rint_GR_fpsr = r19 +rint_GR_rcs0 = r20 +rint_GR_rcs0_mask = r21 + + +// predicate registers used: +// p6-11 + +// floating-point registers used: + +RINT_NORM_f8 = f9 +RINT_FFFF = f10 +RINT_INEXACT = f11 +RINT_FLOAT_INT_f8 = f12 +RINT_INT_f8 = f13 +RINT_SIGNED_FLOAT_INT_f8 = f14 + +// Overview of operation +//============================================================== + +// long double rintl(long double x) +// Return an integer value (represented as a long double) that is x rounded to integer in current +// rounding mode +// Inexact is set if x != rintl(x) +// ******************************************************************************* + +// Set denormal flag for denormal input and +// and take denormal fault if necessary. + +// Is the input an integer value already? + +// double_extended +// if the exponent is >= 1003e => 3F(true) = 63(decimal) +// we have a significand of 64 bits 1.63-bits. +// If we multiply by 2^63, we no longer have a fractional part +// So input is an integer value already. + +// double +// if the exponent is >= 10033 => 34(true) = 52(decimal) +// 34 + 3ff = 433 +// we have a significand of 53 bits 1.52-bits. (implicit 1) +// If we multiply by 2^52, we no longer have a fractional part +// So input is an integer value already. + +// single +// if the exponent is >= 10016 => 17(true) = 23(decimal) +// we have a significand of 53 bits 1.52-bits. (implicit 1) +// If we multiply by 2^52, we no longer have a fractional part +// So input is an integer value already. + +// If x is NAN, ZERO, or INFINITY, then return + +// qnan snan inf norm unorm 0 -+ +// 1 1 1 0 0 1 11 0xe7 + + +.align 32 +.global rintl# + +.section .text +.proc rintl# +.align 32 + + +rintl: +#ifdef _LIBC +.global __rintl +.type __rintl,@function +__rintl: +#endif + +{ .mfi + mov rint_GR_fpsr = ar40 // Read the fpsr--need to check rc.s0 + fcvt.fx.s1 RINT_INT_f8 = f8 + addl rint_GR_10033 = 0x1003e, r0 +} +{ .mfi + mov rint_GR_FFFF = -1 + fnorm.s1 RINT_NORM_f8 = f8 + mov rint_GR_17ones = 0x1FFFF +;; +} + +{ .mfi + setf.sig RINT_FFFF = rint_GR_FFFF + fclass.m.unc p6,p0 = f8, 0xe7 + mov rint_GR_rcs0_mask = 0x0c00 +;; +} + +{ .mfb + nop.m 999 +(p6) fnorm f8 = f8 +(p6) br.ret.spnt b0 // Exit if x nan, inf, zero +;; +} + +{ .mfi + nop.m 999 + fcvt.xf RINT_FLOAT_INT_f8 = RINT_INT_f8 + nop.i 999 +;; +} + +{ .mfi + getf.exp rint_GR_signexp = RINT_NORM_f8 + fcmp.eq.s0 p8,p0 = f8,f0 // Dummy op to set denormal + nop.i 999 +;; +} + + +{ .mii + nop.m 999 + nop.i 999 + and rint_GR_exponent = rint_GR_signexp, rint_GR_17ones +;; +} + +{ .mmi + cmp.ge.unc p7,p6 = rint_GR_exponent, rint_GR_10033 + and rint_GR_rcs0 = rint_GR_rcs0_mask, rint_GR_fpsr + nop.i 999 +;; +} + +// Check to see if s0 rounding mode is round to nearest. If not then set s2 +// rounding mode to that of s0 and repeat conversions. +// Must merge the original sign for cases where the result is zero or the input +// is the largest that still has a fraction (0x1007dfffffffffff) +L(RINT_COMMON): +{ .mfb + cmp.ne p11,p0 = rint_GR_rcs0, r0 +(p6) fmerge.s RINT_SIGNED_FLOAT_INT_f8 = f8, RINT_FLOAT_INT_f8 +(p11) br.cond.spnt L(RINT_NOT_ROUND_NEAREST) // Branch if not round to nearest +;; +} + +{ .mfi + nop.m 999 +(p6) fcmp.eq.unc.s1 p0,p8 = RINT_FLOAT_INT_f8, RINT_NORM_f8 + nop.i 999 +} +{ .mfi + nop.m 999 +(p7) fnorm.s0 f8 = f8 + nop.i 999 +;; +} + +{ .mfi + nop.m 999 +(p6) fnorm f8 = RINT_SIGNED_FLOAT_INT_f8 + nop.i 999 +;; +} + +{ .mfb + nop.m 999 +(p8) fmpy.s0 RINT_INEXACT = RINT_FFFF,RINT_FFFF // Dummy to set inexact + br.ret.sptk b0 +;; +} + +L(RINT_NOT_ROUND_NEAREST): +// Set rounding mode of s2 to that of s0 +{ .mfi + mov rint_GR_rcs0 = r0 // Clear so we don't come back here + fsetc.s2 0x7f, 0x40 + nop.i 999 +;; +} + +{ .mfi + nop.m 999 + fcvt.fx.s2 RINT_INT_f8 = f8 + nop.i 999 +;; +} + +{ .mfb + nop.m 999 + fcvt.xf RINT_FLOAT_INT_f8 = RINT_INT_f8 + br.cond.sptk L(RINT_COMMON) +;; +} + + +.endp rintl +ASM_SIZE_DIRECTIVE(rintl) +#ifdef _LIBC +ASM_SIZE_DIRECTIVE(__rintl) +#endif |