diff options
author | Ulrich Drepper <drepper@redhat.com> | 2004-12-22 20:10:10 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 2004-12-22 20:10:10 +0000 |
commit | a334319f6530564d22e775935d9c91663623a1b4 (patch) | |
tree | b5877475619e4c938e98757d518bb1e9cbead751 /sysdeps/ia64/fpu/s_rintf.S | |
parent | 0ecb606cb6cf65de1d9fc8a919bceb4be476c602 (diff) | |
download | glibc-a334319f6530564d22e775935d9c91663623a1b4.tar.gz glibc-a334319f6530564d22e775935d9c91663623a1b4.tar.xz glibc-a334319f6530564d22e775935d9c91663623a1b4.zip |
(CFLAGS-tst-align.c): Add -mpreferred-stack-boundary=4.
Diffstat (limited to 'sysdeps/ia64/fpu/s_rintf.S')
-rw-r--r-- | sysdeps/ia64/fpu/s_rintf.S | 289 |
1 files changed, 157 insertions, 132 deletions
diff --git a/sysdeps/ia64/fpu/s_rintf.S b/sysdeps/ia64/fpu/s_rintf.S index 05d6b411f2..73cb98a048 100644 --- a/sysdeps/ia64/fpu/s_rintf.S +++ b/sysdeps/ia64/fpu/s_rintf.S @@ -1,10 +1,10 @@ .file "rintf.s" - -// Copyright (c) 2000 - 2003, Intel Corporation +// Copyright (C) 2000, 2001, Intel Corporation // All rights reserved. -// -// Contributed 2000 by the Intel Numerics Group, Intel Corporation +// +// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story, +// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are @@ -20,68 +20,74 @@ // * The name of Intel Corporation may not be used to endorse or promote // products derived from this software without specific prior written // permission. - -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, -// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, -// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING -// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// // Intel Corporation is the author of this code, and requests that all -// problem reports or change requests be submitted to it directly at -// http://www.intel.com/software/products/opensource/libraries/num.htm. +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. // // History //============================================================== -// 02/02/00 Initial version -// 02/08/01 Corrected behavior for all rounding modes. -// 05/20/02 Cleaned up namespace and sf0 syntax -// 01/20/03 Improved performance -//============================================================== - +// 2/02/00: Initial version +// 2/08/01 Corrected behavior for all rounding modes. +// // API //============================================================== // float rintf(float x) -//============================================================== -// general input registers: -// r14 - r21 +#include "libm_support.h" + +// +// general registers used: +// +rint_GR_FFFF = r14 +rint_GR_signexp = r15 +rint_GR_exponent = r16 +rint_GR_17ones = r17 +rint_GR_10033 = r18 +rint_GR_fpsr = r19 +rint_GR_rcs0 = r20 +rint_GR_rcs0_mask = r21 -rSignexp = r14 -rExp = r15 -rExpMask = r16 -rBigexp = r17 -rM1 = r18 -rFpsr = r19 -rRcs0 = r20 -rRcs0Mask = r21 -// floating-point registers: -// f8 - f11 +// predicate registers used: +// p6-11 -fXInt = f9 -fNormX = f10 -fTmp = f11 +// floating-point registers used: -// predicate registers used: -// p6 - p10 +RINT_NORM_f8 = f9 +RINT_FFFF = f10 +RINT_INEXACT = f11 +RINT_FLOAT_INT_f8 = f12 +RINT_INT_f8 = f13 // Overview of operation //============================================================== + // float rintf(float x) -// Return an integer value (represented as a float) that is x -// rounded to integer in current rounding mode -// Inexact is set if x != rint(x) -//============================================================== +// Return an integer value (represented as a float) that is x rounded to integer in current +// rounding mode +// Inexact is set if x != rintf(x) +// ******************************************************************************* + +// Set denormal flag for denormal input and +// and take denormal fault if necessary. + +// Is the input an integer value already? // double_extended -// if the exponent is > 1003e => 3F(true) = 63(decimal) +// if the exponent is >= 1003e => 3F(true) = 63(decimal) // we have a significand of 64 bits 1.63-bits. // If we multiply by 2^63, we no longer have a fractional part // So input is an integer value already. @@ -94,136 +100,155 @@ fTmp = f11 // So input is an integer value already. // single -// if the exponent is > 10016 => 17(true) = 23(decimal) -// we have a significand of 24 bits 1.23-bits. (implicit 1) -// If we multiply by 2^23, we no longer have a fractional part +// if the exponent is >= 10016 => 17(true) = 23(decimal) +// we have a significand of 53 bits 1.52-bits. (implicit 1) +// If we multiply by 2^52, we no longer have a fractional part // So input is an integer value already. +// If x is NAN, ZERO, or INFINITY, then return + +// qnan snan inf norm unorm 0 -+ +// 1 1 1 0 0 1 11 0xe7 + + +.align 32 +.global rintf# + .section .text -GLOBAL_IEEE754_ENTRY(rintf) +.proc rintf# +.align 32 + + +rintf: +#ifdef _LIBC +.global __rintf +.type __rintf,@function +__rintf: +#endif { .mfi - getf.exp rSignexp = f8 // Get signexp, recompute if unorm - fclass.m p7,p0 = f8, 0x0b // Test x unorm - addl rBigexp = 0x10016, r0 // Set exponent at which is integer + mov rint_GR_fpsr = ar40 // Read the fpsr--need to check rc.s0 + fcvt.fx.s1 RINT_INT_f8 = f8 + addl rint_GR_10033 = 0x10016, r0 } { .mfi - mov rM1 = -1 // Set all ones - fcvt.fx.s1 fXInt = f8 // Convert to int in significand - mov rExpMask = 0x1FFFF // Form exponent mask -} + mov rint_GR_FFFF = -1 + fnorm.s1 RINT_NORM_f8 = f8 + mov rint_GR_17ones = 0x1FFFF ;; +} { .mfi - mov rFpsr = ar40 // Read fpsr -- check rc.s0 - fclass.m p6,p0 = f8, 0x1e3 // Test x natval, nan, inf - nop.i 0 -} -{ .mfb - setf.sig fTmp = rM1 // Make const for setting inexact - fnorm.s1 fNormX = f8 // Normalize input -(p7) br.cond.spnt RINT_UNORM // Branch if x unorm -} + setf.sig RINT_FFFF = rint_GR_FFFF + fclass.m.unc p6,p0 = f8, 0xe7 + mov rint_GR_rcs0_mask = 0x0c00 ;; +} - -RINT_COMMON: -// Return here from RINT_UNORM { .mfb - and rExp = rSignexp, rExpMask // Get biased exponent -(p6) fma.s.s0 f8 = f8, f1, f0 // Result if x natval, nan, inf -(p6) br.ret.spnt b0 // Exit if x natval, nan, inf -} + nop.m 999 +(p6) fnorm.s f8 = f8 +(p6) br.ret.spnt b0 // Exit if x nan, inf, zero ;; +} { .mfi - mov rRcs0Mask = 0x0c00 // Mask for rc.s0 - fcvt.xf f8 = fXInt // Result assume |x| < 2^23 - cmp.ge p7,p8 = rExp, rBigexp // Is |x| >= 2^23? -} + nop.m 999 + fcvt.xf RINT_FLOAT_INT_f8 = RINT_INT_f8 + nop.i 999 ;; +} -// We must correct result if |x| >= 2^23 { .mfi - nop.m 0 -(p7) fma.s.s0 f8 = fNormX, f1, f0 // If |x| >= 2^23, result x - nop.i 0 -} + getf.exp rint_GR_signexp = RINT_NORM_f8 + fcmp.eq.s0 p8,p0 = f8,f0 // Dummy op to set denormal + nop.i 999 ;; +} -{ .mfi - nop.m 0 - fcmp.eq.unc.s1 p0, p9 = f8, fNormX // Is result = x ? - nop.i 0 + +{ .mii + nop.m 999 + nop.i 999 + and rint_GR_exponent = rint_GR_signexp, rint_GR_17ones +;; } -{ .mfi - nop.m 0 -(p8) fmerge.s f8 = fNormX, f8 // Make sure sign rint(x) = sign x - nop.i 0 + +{ .mmi + cmp.ge.unc p7,p6 = rint_GR_exponent, rint_GR_10033 + and rint_GR_rcs0 = rint_GR_rcs0_mask, rint_GR_fpsr + nop.i 999 +;; } + +// Check to see if s0 rounding mode is round to nearest. If not then set s2 +// rounding mode to that of s0 and repeat conversions. +L(RINT_COMMON): +{ .mfb + cmp.ne p11,p0 = rint_GR_rcs0, r0 +(p6) fclass.m.unc p9,p10 = RINT_FLOAT_INT_f8, 0x07 // Test for result=0 +(p11) br.cond.spnt L(RINT_NOT_ROUND_NEAREST) // Branch if not round to nearest ;; +} { .mfi -(p8) and rRcs0 = rFpsr, rRcs0Mask // Get rounding mode for sf0 - nop.f 0 - nop.i 0 + nop.m 999 +(p6) fcmp.eq.unc.s1 p0,p8 = RINT_FLOAT_INT_f8, RINT_NORM_f8 + nop.i 999 } +{ .mfi + nop.m 999 +(p7) fnorm.s.s0 f8 = f8 + nop.i 999 ;; +} -// If |x| < 2^23 we must test for other rounding modes +// If result is zero, merge sign of input { .mfi -(p8) cmp.ne.unc p10,p0 = rRcs0, r0 // Test for other rounding modes -(p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact - nop.i 0 -} -{ .mbb - nop.m 0 -(p10) br.cond.spnt RINT_NOT_ROUND_NEAREST // Branch if not round nearest - br.ret.sptk b0 // Exit main path if round nearest + nop.m 999 +(p9) fmerge.s f8 = f8, RINT_FLOAT_INT_f8 + nop.i 999 } +{ .mfi + nop.m 999 +(p10) fnorm.s f8 = RINT_FLOAT_INT_f8 + nop.i 999 ;; +} - - -RINT_UNORM: -// Here if x unorm { .mfb - getf.exp rSignexp = fNormX // Get signexp, recompute if unorm - fcmp.eq.s0 p7,p0 = f8, f0 // Dummy op to set denormal flag - br.cond.sptk RINT_COMMON // Return to main path -} + nop.m 999 +(p8) fmpy.s0 RINT_INEXACT = RINT_FFFF,RINT_FFFF // Dummy to set inexact + br.ret.sptk b0 ;; - -RINT_NOT_ROUND_NEAREST: -// Here if not round to nearest, and |x| < 2^23 -// Set rounding mode of s2 to that of s0, and repeat the conversion using s2 -{ .mfi - nop.m 0 - fsetc.s2 0x7f, 0x40 - nop.i 0 } -;; +L(RINT_NOT_ROUND_NEAREST): +// Set rounding mode of s2 to that of s0 { .mfi - nop.m 0 - fcvt.fx.s2 fXInt = fNormX // Convert to int in significand - nop.i 0 -} + mov rint_GR_rcs0 = r0 // Clear so we don't come back here + fsetc.s2 0x7f, 0x40 + nop.i 999 ;; +} { .mfi - nop.m 0 - fcvt.xf f8 = fXInt // Expected result - nop.i 0 -} + nop.m 999 + fcvt.fx.s2 RINT_INT_f8 = f8 + nop.i 999 ;; +} -// Be sure sign of result = sign of input. Fixes cases where result is 0. { .mfb - nop.m 0 - fmerge.s f8 = fNormX, f8 - br.ret.sptk b0 // Exit main path -} + nop.m 999 + fcvt.xf RINT_FLOAT_INT_f8 = RINT_INT_f8 + br.cond.sptk L(RINT_COMMON) ;; +} + -GLOBAL_IEEE754_END(rintf) +.endp rintf +ASM_SIZE_DIRECTIVE(rintf) +#ifdef _LIBC +ASM_SIZE_DIRECTIVE(__rintf) +#endif |