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author | Ulrich Drepper <drepper@redhat.com> | 2001-02-19 09:09:18 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 2001-02-19 09:09:18 +0000 |
commit | 8da2915d5dcfa51cb5f9e55f7716b49858c1d59d (patch) | |
tree | aa219472cc41fcb82789b12723628cb6a33cc774 /sysdeps/ia64/fpu/e_sqrt.S | |
parent | e208f556cad11f729533385e46e4191fcc49aa0a (diff) | |
download | glibc-8da2915d5dcfa51cb5f9e55f7716b49858c1d59d.tar.gz glibc-8da2915d5dcfa51cb5f9e55f7716b49858c1d59d.tar.xz glibc-8da2915d5dcfa51cb5f9e55f7716b49858c1d59d.zip |
Update.
2001-02-19 Ulrich Drepper <drepper@redhat.com> * libio/iogetline.c: Move return until after last statement. * localedata/show-ucs-data.c: Don't show < > for better readability. * sysdeps/ia64/fpu/Dist: New file. * sysdeps/ia64/fpu/Makefile: New file. * sysdeps/ia64/fpu/Versions: New file. * sysdeps/ia64/fpu/e_acos.S: New file. * sysdeps/ia64/fpu/e_acosf.S: New file. * sysdeps/ia64/fpu/e_acosl.S: New file. * sysdeps/ia64/fpu/e_asin.S: New file. * sysdeps/ia64/fpu/e_asinf.S: New file. * sysdeps/ia64/fpu/e_asinl.S: New file. * sysdeps/ia64/fpu/e_atan2.S: New file. * sysdeps/ia64/fpu/e_atan2f.S: New file. * sysdeps/ia64/fpu/e_atan2l.c: New file. * sysdeps/ia64/fpu/e_cosh.S: New file. * sysdeps/ia64/fpu/e_coshf.S: New file. * sysdeps/ia64/fpu/e_coshl.S: New file. * sysdeps/ia64/fpu/e_exp.S: New file. * sysdeps/ia64/fpu/e_expf.S: New file. * sysdeps/ia64/fpu/e_expl.c: New file. * sysdeps/ia64/fpu/e_fmod.S: New file. * sysdeps/ia64/fpu/e_fmodf.S: New file. * sysdeps/ia64/fpu/e_fmodl.S: New file. * sysdeps/ia64/fpu/e_hypot.S: New file. * sysdeps/ia64/fpu/e_hypotf.S: New file. * sysdeps/ia64/fpu/e_hypotl.S: New file. * sysdeps/ia64/fpu/e_log.S: New file. * sysdeps/ia64/fpu/e_log10.c: New file. * sysdeps/ia64/fpu/e_log10f.c: New file. * sysdeps/ia64/fpu/e_log10l.c: New file. * sysdeps/ia64/fpu/e_logf.S: New file. * sysdeps/ia64/fpu/e_logl.c: New file. * sysdeps/ia64/fpu/e_pow.S: New file. * sysdeps/ia64/fpu/e_powf.S: New file. * sysdeps/ia64/fpu/e_powl.S: New file. * sysdeps/ia64/fpu/e_rem_pio2.c: New file. * sysdeps/ia64/fpu/e_rem_pio2f.c: New file. * sysdeps/ia64/fpu/e_remainder.S: New file. * sysdeps/ia64/fpu/e_remainderf.S: New file. * sysdeps/ia64/fpu/e_remainderl.S: New file. * sysdeps/ia64/fpu/e_scalb.S: New file. * sysdeps/ia64/fpu/e_scalbf.S: New file. * sysdeps/ia64/fpu/e_scalbl.S: New file. * sysdeps/ia64/fpu/e_sinh.S: New file. * sysdeps/ia64/fpu/e_sinhf.S: New file. * sysdeps/ia64/fpu/e_sinhl.S: New file. * sysdeps/ia64/fpu/e_sqrt.S: New file. * sysdeps/ia64/fpu/e_sqrtf.S: New file. * sysdeps/ia64/fpu/e_sqrtl.S: New file. * sysdeps/ia64/fpu/k_rem_pio2.c: New file. * sysdeps/ia64/fpu/k_rem_pio2f.c: New file. * sysdeps/ia64/fpu/k_rem_pio2l.c: New file. * sysdeps/ia64/fpu/libm_atan2_reg.S: New file. * sysdeps/ia64/fpu/libm_error.c: New file. * sysdeps/ia64/fpu/libm_frexp4.S: New file. * sysdeps/ia64/fpu/libm_frexp4f.S: New file. * sysdeps/ia64/fpu/libm_frexp4l.S: New file. * sysdeps/ia64/fpu/libm_reduce.S: New file. * sysdeps/ia64/fpu/libm_support.h: New file. * sysdeps/ia64/fpu/libm_tan.S: New file. * sysdeps/ia64/fpu/s_atan.S: New file. * sysdeps/ia64/fpu/s_atanf.S: New file. * sysdeps/ia64/fpu/s_atanl.S: New file. * sysdeps/ia64/fpu/s_cbrt.S: New file. * sysdeps/ia64/fpu/s_cbrtf.S: New file. * sysdeps/ia64/fpu/s_cbrtl.S: New file. * sysdeps/ia64/fpu/s_ceil.S: New file. * sysdeps/ia64/fpu/s_ceilf.S: New file. * sysdeps/ia64/fpu/s_ceill.S: New file. * sysdeps/ia64/fpu/s_cos.S: New file. * sysdeps/ia64/fpu/s_cosf.S: New file. * sysdeps/ia64/fpu/s_cosl.S: New file. * sysdeps/ia64/fpu/s_expm1.S: New file. * sysdeps/ia64/fpu/s_expm1f.S: New file. * sysdeps/ia64/fpu/s_expm1l.S: New file. * sysdeps/ia64/fpu/s_floor.S: New file. * sysdeps/ia64/fpu/s_floorf.S: New file. * sysdeps/ia64/fpu/s_floorl.S: New file. * sysdeps/ia64/fpu/s_frexp.c: New file. * sysdeps/ia64/fpu/s_frexpf.c: New file. * sysdeps/ia64/fpu/s_frexpl.c: New file. * sysdeps/ia64/fpu/s_ilogb.S: New file. * sysdeps/ia64/fpu/s_ilogbf.S: New file. * sysdeps/ia64/fpu/s_ilogbl.S: New file. * sysdeps/ia64/fpu/s_ldexp.S: New file. * sysdeps/ia64/fpu/s_ldexpf.S: New file. * sysdeps/ia64/fpu/s_ldexpl.S: New file. * sysdeps/ia64/fpu/s_log1p.S: New file. * sysdeps/ia64/fpu/s_log1pf.S: New file. * sysdeps/ia64/fpu/s_log1pl.S: New file. * sysdeps/ia64/fpu/s_logb.S: New file. * sysdeps/ia64/fpu/s_logbf.S: New file. * sysdeps/ia64/fpu/s_logbl.S: New file. * sysdeps/ia64/fpu/s_matherrf.c: New file. * sysdeps/ia64/fpu/s_matherrl.c: New file. * sysdeps/ia64/fpu/s_modf.S: New file. * sysdeps/ia64/fpu/s_modff.S: New file. * sysdeps/ia64/fpu/s_modfl.S: New file. * sysdeps/ia64/fpu/s_nearbyint.S: New file. * sysdeps/ia64/fpu/s_nearbyintf.S: New file. * sysdeps/ia64/fpu/s_nearbyintl.S: New file. * sysdeps/ia64/fpu/s_rint.S: New file. * sysdeps/ia64/fpu/s_rintf.S: New file. * sysdeps/ia64/fpu/s_rintl.S: New file. * sysdeps/ia64/fpu/s_round.S: New file. * sysdeps/ia64/fpu/s_roundf.S: New file. * sysdeps/ia64/fpu/s_roundl.S: New file. * sysdeps/ia64/fpu/s_scalbn.S: New file. * sysdeps/ia64/fpu/s_scalbnf.S: New file. * sysdeps/ia64/fpu/s_scalbnl.S: New file. * sysdeps/ia64/fpu/s_significand.S: New file. * sysdeps/ia64/fpu/s_significandf.S: New file. * sysdeps/ia64/fpu/s_significandl.S: New file. * sysdeps/ia64/fpu/s_sin.c: New file. * sysdeps/ia64/fpu/s_sincos.c: New file. * sysdeps/ia64/fpu/s_sincosf.c: New file. * sysdeps/ia64/fpu/s_sincosl.c: New file. * sysdeps/ia64/fpu/s_sinf.c: New file. * sysdeps/ia64/fpu/s_sinl.c: New file. * sysdeps/ia64/fpu/s_tan.S: New file. * sysdeps/ia64/fpu/s_tanf.S: New file. * sysdeps/ia64/fpu/s_tanl.S: New file. * sysdeps/ia64/fpu/s_trunc.S: New file. * sysdeps/ia64/fpu/s_truncf.S: New file. * sysdeps/ia64/fpu/s_truncl.S: New file. * sysdeps/ia64/fpu/w_acos.c: New file. * sysdeps/ia64/fpu/w_acosf.c: New file. * sysdeps/ia64/fpu/w_acosl.c: New file. * sysdeps/ia64/fpu/w_asin.c: New file. * sysdeps/ia64/fpu/w_asinf.c: New file. * sysdeps/ia64/fpu/w_asinl.c: New file. * sysdeps/ia64/fpu/w_atan2.c: New file. * sysdeps/ia64/fpu/w_atan2f.c: New file. * sysdeps/ia64/fpu/w_atan2l.c: New file. * sysdeps/ia64/fpu/w_cosh.c: New file. * sysdeps/ia64/fpu/w_coshf.c: New file. * sysdeps/ia64/fpu/w_coshl.c: New file. * sysdeps/ia64/fpu/w_exp.c: New file. * sysdeps/ia64/fpu/w_expf.c: New file. * sysdeps/ia64/fpu/w_fmod.c: New file. * sysdeps/ia64/fpu/w_fmodf.c: New file. * sysdeps/ia64/fpu/w_fmodl.c: New file. * sysdeps/ia64/fpu/w_hypot.c: New file. * sysdeps/ia64/fpu/w_hypotf.c: New file. * sysdeps/ia64/fpu/w_hypotl.c: New file. * sysdeps/ia64/fpu/w_log.c: New file. * sysdeps/ia64/fpu/w_log10.c: New file. * sysdeps/ia64/fpu/w_log10f.c: New file. * sysdeps/ia64/fpu/w_log10l.c: New file. * sysdeps/ia64/fpu/w_logf.c: New file. * sysdeps/ia64/fpu/w_logl.c: New file. * sysdeps/ia64/fpu/w_pow.c: New file. * sysdeps/ia64/fpu/w_powf.c: New file. * sysdeps/ia64/fpu/w_powl.c: New file. * sysdeps/ia64/fpu/w_remainder.c: New file. * sysdeps/ia64/fpu/w_remainderf.c: New file. * sysdeps/ia64/fpu/w_remainderl.c: New file. * sysdeps/ia64/fpu/w_scalb.c: New file. * sysdeps/ia64/fpu/w_scalbf.c: New file. * sysdeps/ia64/fpu/w_scalbl.c: New file. * sysdeps/ia64/fpu/w_sqrt.c: New file. * sysdeps/ia64/fpu/w_sqrtf.c: New file. * sysdeps/ia64/fpu/w_sqrtl.c: New file. * sysdeps/ia64/fpu/libm-test-ulps: Adjust for long double implementation. * sysdeps/ia64/fpu/bits/mathdef.h: Correct float_t and double_t types. Change FP_ILOGBNAN for new implementation. * Verions.def: Add 2.2.3 versions.
Diffstat (limited to 'sysdeps/ia64/fpu/e_sqrt.S')
-rw-r--r-- | sysdeps/ia64/fpu/e_sqrt.S | 347 |
1 files changed, 347 insertions, 0 deletions
diff --git a/sysdeps/ia64/fpu/e_sqrt.S b/sysdeps/ia64/fpu/e_sqrt.S new file mode 100644 index 0000000000..ee6eb653f3 --- /dev/null +++ b/sysdeps/ia64/fpu/e_sqrt.S @@ -0,0 +1,347 @@ +.file "sqrt.s" + +// Copyright (c) 2000, 2001, Intel Corporation +// All rights reserved. +// +// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story, +// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// +// ******************************************************************** +// History +// ******************************************************************** +// 2/02/00 Initial version +// 4/04/00 Unwind support added +// 8/15/00 Bundle added after call to __libm_error_support to properly +// set [the previously overwritten] GR_Parameter_RESULT. +// +// ******************************************************************** +// +// Function: Combined sqrt(x), where +// _ +// sqrt(x) = |x, for double precision x values +// +// ******************************************************************** +// +// Accuracy: Correctly Rounded +// +// ******************************************************************** +// +// Resources Used: +// +// Floating-Point Registers: f8 (Input and Return Value) +// f7 -f14 +// +// General Purpose Registers: +// r32-r36 (Locals) +// r37-r40 (Used to pass arguments to error handling routine) +// +// Predicate Registers: p6, p7, p8 +// +// ********************************************************************* +// +// IEEE Special Conditions: +// +// All faults and exceptions should be raised correctly. +// sqrt(QNaN) = QNaN +// sqrt(SNaN) = QNaN +// sqrt(+/-0) = +/-0 +// sqrt(negative) = QNaN and error handling is called +// +// ********************************************************************* +// +// Implementation: +// +// Modified Newton-Raphson Algorithm +// +// ********************************************************************* + +#include "libm_support.h" + +GR_SAVE_PFS = r33 +GR_SAVE_B0 = r34 +GR_SAVE_GP = r35 + +GR_Parameter_X = r37 +GR_Parameter_Y = r38 +GR_Parameter_RESULT = r39 + + +.section .text +.proc sqrt# +.global sqrt# +.align 64 + +sqrt: +#ifdef _LIBC +.global __sqrt +.type __sqrt,@function +__sqrt: +.global __ieee754_sqrt +.type __ieee754_sqrt,@function +__ieee754_sqrt: +#endif +{ .mfi + alloc r32= ar.pfs,0,5,4,0 + frsqrta.s0 f7,p6=f8 + nop.i 0 +} { .mlx + // BEGIN DOUBLE PRECISION MINIMUM LATENCY SQUARE ROOT ALGORITHM + nop.m 0 + // exponent of +1/2 in r2 + movl r2 = 0x0fffe;; +} { .mmi + // +1/2 in f9 + setf.exp f9 = r2 + nop.m 0 + nop.i 0 +} { .mlx + nop.m 0 + // 3/2 in r3 + movl r3=0x3fc00000;; +} { .mfi + setf.s f10=r3 + // Step (1) + // y0 = 1/sqrt(a) in f7 + fclass.m.unc p7,p8 = f8,0x3A + nop.i 0;; +} { .mlx + nop.m 0 + // 5/2 in r2 + movl r2 = 0x40200000 +} { .mlx + nop.m 0 + // 63/8 in r3 + movl r3 = 0x40fc0000;; +} { .mfi + setf.s f11=r2 + // Step (2) + // h = +1/2 * y0 in f6 + (p6) fma.s1 f6=f9,f7,f0 + nop.i 0 +} { .mfi + setf.s f12=r3 + // Step (3) + // g = a * y0 in f7 + (p6) fma.s1 f7=f8,f7,f0 + nop.i 0 +} { .mfi + nop.m 0 + mov f15 = f8 + nop.i 0;; +} { .mlx + nop.m 0 + // 231/16 in r2 + movl r2 = 0x41670000;; +} { .mfi + setf.s f13=r2 + // Step (4) + // e = 1/2 - g * h in f9 + (p6) fnma.s1 f9=f7,f6,f9 + nop.i 0 +} { .mlx + nop.m 0 + // 35/8 in r3 + movl r3 = 0x408c0000;; +} { .mfi + setf.s f14=r3 + // Step (5) + // S = 3/2 + 5/2 * e in f10 + (p6) fma.s1 f10=f11,f9,f10 + nop.i 0 +} { .mfi + nop.m 0 + // Step (6) + // e2 = e * e in f11 + (p6) fma.s1 f11=f9,f9,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (7) + // t = 63/8 + 231/16 * e in f12 + (p6) fma.s1 f12=f13,f9,f12 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (8) + // S1 = e + e2 * S in f10 + (p6) fma.s1 f10=f11,f10,f9 + nop.i 0 +} { .mfi + nop.m 0 + // Step (9) + // e4 = e2 * e2 in f11 + (p6) fma.s1 f11=f11,f11,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (10) + // t1 = 35/8 + e * t in f9 + (p6) fma.s1 f9=f9,f12,f14 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (11) + // G = g + S1 * g in f12 + (p6) fma.s1 f12=f10,f7,f7 + nop.i 0 +} { .mfi + nop.m 0 + // Step (12) + // E = g * e4 in f7 + (p6) fma.s1 f7=f7,f11,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (13) + // u = S1 + e4 * t1 in f10 + (p6) fma.s1 f10=f11,f9,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (14) + // g1 = G + t1 * E in f7 + (p6) fma.d.s1 f7=f9,f7,f12 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (15) + // h1 = h + u * h in f6 + (p6) fma.s1 f6=f10,f6,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (16) + // d = a - g1 * g1 in f9 + (p6) fnma.s1 f9=f7,f7,f8 + nop.i 0;; +} { .mfb + nop.m 0 + // Step (17) + // g2 = g1 + d * h1 in f7 + (p6) fma.d.s0 f8=f9,f6,f7 + (p6) br.ret.sptk b0 ;; +} + +{ .mfb + nop.m 0 + (p0) mov f8 = f7 + (p8) br.ret.sptk b0 ;; +} +{ .mfb + (p7) mov r40 = 49 + nop.f 0 + (p7) br.cond.sptk __libm_error_region ;; +} +// END DOUBLE PRECISION MINIMUM LATENCY SQUARE ROOT ALGORITHM +.endp sqrt# +ASM_SIZE_DIRECTIVE(sqrt) +#ifdef _LIBC +ASM_SIZE_DIRECTIVE(__sqrt) +ASM_SIZE_DIRECTIVE(__ieee754_sqrt) +#endif + +// Stack operations when calling error support. +// (1) (2) (3) (call) (4) +// sp -> + psp -> + psp -> + sp -> + +// | | | | +// | | <- GR_Y R3 ->| <- GR_RESULT | -> f8 +// | | | | +// | <-GR_Y Y2->| Y2 ->| <- GR_Y | +// | | | | +// | | <- GR_X X1 ->| | +// | | | | +// sp-64 -> + sp -> + sp -> + + +// save ar.pfs save b0 restore gp +// save gp restore ar.pfs + + +.proc __libm_error_region +__libm_error_region: + +// +// This branch includes all those special values that are not negative, +// with the result equal to frcpa(x) +// + +.prologue +// We are distinguishing between over(under)flow and letting +// __libm_error_support set ERANGE or do anything else needed. + +// (1) +{ .mfi + add GR_Parameter_Y=-32,sp // Parameter 2 value + nop.f 0 +.save ar.pfs,GR_SAVE_PFS + mov GR_SAVE_PFS=ar.pfs // Save ar.pfs +} +{ .mfi +.fframe 64 + add sp=-64,sp // Create new stack + nop.f 0 + mov GR_SAVE_GP=gp // Save gp +};; + + +// (2) +{ .mmi + stfd [GR_Parameter_Y] = f0,16 // STORE Parameter 2 on stack + add GR_Parameter_X = 16,sp // Parameter 1 address +.save b0, GR_SAVE_B0 + mov GR_SAVE_B0=b0 // Save b0 +};; + +.body +// (3) +{ .mib + stfd [GR_Parameter_X] = f15 // STORE Parameter 1 on stack + add GR_Parameter_RESULT = 0,GR_Parameter_Y // Parameter 3 address + nop.b 0 +} +{ .mib + stfd [GR_Parameter_Y] = f8 // STORE Parameter 3 on stack + add GR_Parameter_Y = -16,GR_Parameter_Y + br.call.sptk b0=__libm_error_support# // Call error handling function +};; +{ .mmi + nop.m 0 + nop.m 0 + add GR_Parameter_RESULT = 48,sp +};; + +// (4) +{ .mmi + ldfd f8 = [GR_Parameter_RESULT] // Get return result off stack +.restore sp + add sp = 64,sp // Restore stack pointer + mov b0 = GR_SAVE_B0 // Restore return address +};; +{ .mib + mov gp = GR_SAVE_GP // Restore gp + mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs + br.ret.sptk b0 // Return +};; + +.endp __libm_error_region +ASM_SIZE_DIRECTIVE(__libm_error_region) + + +.type __libm_error_support#,@function +.global __libm_error_support# |