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authorRoland McGrath <roland@gnu.org>2000-03-17 09:27:02 +0000
committerRoland McGrath <roland@gnu.org>2000-03-17 09:27:02 +0000
commit4ae1869356ec212162cec5fac5a995c134fbd2c0 (patch)
treed2892deb1cff4d097abc72bad0aa01dbfbbfa110 /sysdeps/i386/sys
parentda28fa2a447b193788c0ad7a9b3d97e37fc3bf8b (diff)
downloadglibc-4ae1869356ec212162cec5fac5a995c134fbd2c0.tar.gz
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* sysdeps/i386/sys/ucontext.h: Prepend REG_ to enum values and
	macros for register names, in line with 2000-03-14 linux change.
Diffstat (limited to 'sysdeps/i386/sys')
-rw-r--r--sysdeps/i386/sys/ucontext.h78
1 files changed, 39 insertions, 39 deletions
diff --git a/sysdeps/i386/sys/ucontext.h b/sysdeps/i386/sys/ucontext.h
index 397c29a7b8..2e7d73bf6a 100644
--- a/sysdeps/i386/sys/ucontext.h
+++ b/sysdeps/i386/sys/ucontext.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 1997, 1999 Free Software Foundation, Inc.
+/* Copyright (C) 1997,99,2000 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -36,44 +36,44 @@ typedef greg_t gregset_t[NGREG];
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
-  GS = 0,
-#define GS	GS
-  FS,
-#define FS	FS
-  ES,
-#define ES	ES
-  DS,
-#define DS	DS
-  EDI,
-#define EDI	EDI
-  ESI,
-#define ESI	ESI
-  EBP,
-#define EBP	EBP
-  ESP,
-#define ESP	ESP
-  EBX,
-#define EBX	EBX
-  EDX,
-#define EDX	EDX
-  ECX,
-#define ECX	ECX
-  EAX,
-#define EAX	EAX
-  TRAPNO,
-#define TRAPNO	TRAPNO
-  ERR,
-#define ERR	ERR
-  EIP,
-#define EIP	EIP
-  CS,
-#define CS	CS
-  EFL,
-#define EFL	EFL
-  UESP,
-#define UESP	UESP
-  SS
-#define SS	SS
+  REG_GS = 0,
+#define REG_GS	REG_GS
+  REG_FS,
+#define REG_FS	REG_FS
+  REG_ES,
+#define REG_ES	REG_ES
+  REG_DS,
+#define REG_DS	REG_DS
+  REG_EDI,
+#define REG_EDI	REG_EDI
+  REG_ESI,
+#define REG_ESI	REG_ESI
+  REG_EBP,
+#define REG_EBP	REG_EBP
+  REG_ESP,
+#define REG_ESP	REG_ESP
+  REG_EBX,
+#define REG_EBX	REG_EBX
+  REG_EDX,
+#define REG_EDX	REG_EDX
+  REG_ECX,
+#define REG_ECX	REG_ECX
+  REG_EAX,
+#define REG_EAX	REG_EAX
+  REG_TRAPNO,
+#define REG_TRAPNO	REG_TRAPNO
+  REG_ERR,
+#define REG_ERR	REG_ERR
+  REG_EIP,
+#define REG_EIP	REG_EIP
+  REG_CS,
+#define REG_CS	REG_CS
+  REG_EFL,
+#define REG_EFL	REG_EFL
+  REG_UESP,
+#define REG_UESP	REG_UESP
+  REG_SS
+#define REG_SS	REG_SS
 };
 
 /* Structure to describe FPU registers.  */