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author | Andreas Schwab <schwab@suse.de> | 2014-10-21 11:09:19 +0200 |
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committer | Andreas Schwab <schwab@suse.de> | 2014-10-27 10:44:28 +0100 |
commit | 3574f2fdf3827d4953d19a89063e517263b5df85 (patch) | |
tree | cdbe317761f280507d91b213133bf1cde3eb2951 /sysdeps/i386/i686/multiarch/strcmp.S | |
parent | 461a7b1e4551ee9018f7542c21ff32b0f9872e7f (diff) | |
download | glibc-3574f2fdf3827d4953d19a89063e517263b5df85.tar.gz glibc-3574f2fdf3827d4953d19a89063e517263b5df85.tar.xz glibc-3574f2fdf3827d4953d19a89063e517263b5df85.zip |
Fix misdetected Slow_SSE4_2 cpu feature bit (bug 17501)
Diffstat (limited to 'sysdeps/i386/i686/multiarch/strcmp.S')
-rw-r--r-- | sysdeps/i386/i686/multiarch/strcmp.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/i386/i686/multiarch/strcmp.S b/sysdeps/i386/i686/multiarch/strcmp.S index 2ad6bf4212..23cbd6f3c5 100644 --- a/sysdeps/i386/i686/multiarch/strcmp.S +++ b/sysdeps/i386/i686/multiarch/strcmp.S @@ -68,7 +68,7 @@ ENTRY(STRCMP) leal __STRCMP_SSSE3@GOTOFF(%ebx), %eax testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx) jz 2f - testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx) + testl $bit_Slow_SSE4_2, FEATURE_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx) jnz 2f leal __STRCMP_SSE4_2@GOTOFF(%ebx), %eax 2: popl %ebx @@ -89,7 +89,7 @@ ENTRY(STRCMP) leal __STRCMP_SSSE3, %eax testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features jz 2f - testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features + testl $bit_Slow_SSE4_2, FEATURE_OFFSET+index_Slow_SSE4_2+__cpu_features jnz 2f leal __STRCMP_SSE4_2, %eax 2: ret |