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| author | Ulrich Drepper <drepper@redhat.com> | 2003-07-22 00:14:36 +0000 |
|---|---|---|
| committer | Ulrich Drepper <drepper@redhat.com> | 2003-07-22 00:14:36 +0000 |
| commit | b72e048f190dba7202751d8c27508f82e015ebad (patch) | |
| tree | f6afe8b7897b981d99b636c5081fb45ab060f580 /sysdeps/i386/fpu/feenablxcpt.c | |
| parent | 1a379ea0c7adae02b4cd08410a5204e8b725064d (diff) | |
| download | glibc-b72e048f190dba7202751d8c27508f82e015ebad.tar.gz glibc-b72e048f190dba7202751d8c27508f82e015ebad.tar.xz glibc-b72e048f190dba7202751d8c27508f82e015ebad.zip | |
Update.
* sysdeps/i386/fpu/fedisblxcpt.c: Use dl_hwcap, not dl_hwcap_mask. * sysdeps/i386/fpu/feenablxcpt.c: Likewise. * sysdeps/i386/fpu/feholdexcpt.c: Likewise. * sysdeps/i386/fpu/fesetround.c: Likewise. * sysdeps/i386/fpu/ftestexcept.c: Likewise.
Diffstat (limited to 'sysdeps/i386/fpu/feenablxcpt.c')
| -rw-r--r-- | sysdeps/i386/fpu/feenablxcpt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/i386/fpu/feenablxcpt.c b/sysdeps/i386/fpu/feenablxcpt.c index 0f841caad9..a000d02d35 100644 --- a/sysdeps/i386/fpu/feenablxcpt.c +++ b/sysdeps/i386/fpu/feenablxcpt.c @@ -39,7 +39,7 @@ feenableexcept (int excepts) __asm__ ("fldcw %0" : : "m" (*&new_exc)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0) + if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; |