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author | Joseph Myers <joseph@codesourcery.com> | 2017-05-11 14:15:26 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2017-05-11 14:15:26 +0000 |
commit | 5df4854ed21641e5f82e17677fc385e05480ce3a (patch) | |
tree | fbedb845192c28581f6954ccb4b30d7e9c29e2d6 /sysdeps/arm | |
parent | 0a19a9189678e8719c8423648417b0f44a83fd2c (diff) | |
download | glibc-5df4854ed21641e5f82e17677fc385e05480ce3a.tar.gz glibc-5df4854ed21641e5f82e17677fc385e05480ce3a.tar.xz glibc-5df4854ed21641e5f82e17677fc385e05480ce3a.zip |
Condition some sys/ucontext.h contents on __USE_MISC (bug 21457).
Continuing the fixes for namespace issues arising from sys/ucontext.h, this patch conditions various definitions, that are not needed for defining mcontext_t / ucontext_t, on __USE_MISC, so they do not appear in strict POSIX modes. This patch is non-exhaustive; that is, it only conditions straightforward cases and there may be more such definitions that can be conditioned for these and other architectures, to be dealt with later in separate patches. Also, using __USE_MISC is the minimum change for these definitions where they conflict with POSIX; some headers already have __USE_GNU conditionals on similar definitions of names for registers. The patch specifically does not do anything with definitions in bits/sigcontext.h, and nor does it condition any inclusions of bits/sigcontext.h even where in fact that is not needed on some architectures for the definitions of mcontext_t / ucontext_t. As other namespace issues in these headers remain, this patch does not fix bug 21457, nor allow any XFAILs to be removed. Tested with build-many-glibcs.py. [BZ #21457] * sysdeps/arm/sys/ucontext.h (R0): Condition on [__USE_MISC]. (R1): Likewise. (R2): Likewise. (R3): Likewise. (R4): Likewise. (R5): Likewise. (R6): Likewise. (R7): Likewise. (R8): Likewise. (R9): Likewise. (R10): Likewise. (R11): Likewise. (R12): Likewise. (R13): Likewise. (R14): Likewise. (R15): Likewise. * sysdeps/i386/sys/ucontext.h (REG_GS): Likewise. (REG_FS): Likewise. (REG_ES): Likewise. (REG_DS): Likewise. (REG_EDI): Likewise. (REG_ESI): Likewise. (REG_EBP): Likewise. (REG_ESP): Likewise. (REG_EBX): Likewise. (REG_EDX): Likewise. (REG_ECX): Likewise. (REG_EAX): Likewise. (REG_TRAPNO): Likewise. (REG_ERR): Likewise. (REG_EIP): Likewise. (REG_CS): Likewise. (REG_EFL): Likewise. (REG_UESP): Likewise. (REG_SS): Likewise. * sysdeps/m68k/sys/ucontext.h (R_D0): Likewise. (R_D1): Likewise. (R_D2): Likewise. (R_D3): Likewise. (R_D4): Likewise. (R_D5): Likewise. (R_D6): Likewise. (R_D7): Likewise. (R_A0): Likewise. (R_A1): Likewise. (R_A2): Likewise. (R_A3): Likewise. (R_A4): Likewise. (R_A5): Likewise. (R_A6): Likewise. (R_A7): Likewise. (R_SP): Likewise. (R_PC): Likewise. (R_PS): Likewise. (fpregset_t): Likewise. (MCONTEXT_VERSION): Likewise. * sysdeps/mips/sys/ucontext.h (CTX_R0): Likewise. (CTX_AT): Likewise. (CTX_V0): Likewise. (CTX_V1): Likewise. (CTX_A0): Likewise. (CTX_A1): Likewise. (CTX_A2): Likewise. (CTX_A3): Likewise. (CTX_T0): Likewise. (CTX_T1): Likewise. (CTX_T2): Likewise. (CTX_T3): Likewise. (CTX_T4): Likewise. (CTX_T5): Likewise. (CTX_T6): Likewise. (CTX_T7): Likewise. (CTX_S0): Likewise. (CTX_S1): Likewise. (CTX_S2): Likewise. (CTX_S3): Likewise. (CTX_S4): Likewise. (CTX_S5): Likewise. (CTX_S6): Likewise. (CTX_S7): Likewise. (CTX_T8): Likewise. (CTX_T9): Likewise. (CTX_K0): Likewise. (CTX_K1): Likewise. (CTX_GP): Likewise. (CTX_SP): Likewise. (CTX_S8): Likewise. (CTX_RA): Likewise. (CTX_MDLO): Likewise. (CTX_MDHI): Likewise. (CTX_CAUSE): Likewise. (CTX_EPC): Likewise. * sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h: Condition inclusion of <sys/procfs.h> on [__USE_MISC]. (greg_t): Condition on [__USE_MISC]. (gregset_t): Likewise. (fpregset_t): Likewise. * sysdeps/unix/sysv/linux/arm/sys/ucontext.h (greg_t): Likewise. (NGREG): Likewise. (gregset_t): Likewise. (REG_R0): Likewise. (REG_R1): Likewise. (REG_R2): Likewise. (REG_R3): Likewise. (REG_R4): Likewise. (REG_R5): Likewise. (REG_R6): Likewise. (REG_R7): Likewise. (REG_R8): Likewise. (REG_R9): Likewise. (REG_R10): Likewise. (REG_R11): Likewise. (REG_R12): Likewise. (REG_R13): Likewise. (REG_R14): Likewise. (REG_R15): Likewise. (struct _libc_fpstate): Likewise. (fpregset_t): Likewise. * sysdeps/unix/sysv/linux/hppa/sys/ucontext.h (NGREG): Likewise. (NFPREG): Likewise. (gregset_t): Likewise. (fpregset_t): Likewise. * sysdeps/unix/sysv/linux/m68k/sys/ucontext.h (R_D0): Likewise. (R_D1): Likewise. (R_D2): Likewise. (R_D3): Likewise. (R_D4): Likewise. (R_D5): Likewise. (R_D6): Likewise. (R_D7): Likewise. (R_A0): Likewise. (R_A1): Likewise. (R_A2): Likewise. (R_A3): Likewise. (R_A4): Likewise. (R_A5): Likewise. (R_A6): Likewise. (R_A7): Likewise. (R_SP): Likewise. (R_PC): Likewise. (R_PS): Likewise. (fpregset_t): Likewise. (MCONTEXT_VERSION): Likewise. * sysdeps/unix/sysv/linux/nios2/sys/ucontext.h (MCONTEXT_VERSION): Likewise. * sysdeps/unix/sysv/linux/sh/sys/ucontext.h (REG_R0): Likewise. (REG_R1): Likewise. (REG_R2): Likewise. (REG_R3): Likewise. (REG_R4): Likewise. (REG_R5): Likewise. (REG_R6): Likewise. (REG_R7): Likewise. (REG_R8): Likewise. (REG_R9): Likewise. (REG_R10): Likewise. (REG_R11): Likewise. (REG_R12): Likewise. (REG_R13): Likewise. (REG_R14): Likewise. (REG_R15): Likewise. * sysdeps/unix/sysv/linux/tile/sys/ucontext.h: Condition inclusion of <arch/abi.h> on [__USE_MISC]. (greg_t): Condition on [__USE_MISC]. (NGREG): Likewise. (gregset_t): Likewise.
Diffstat (limited to 'sysdeps/arm')
-rw-r--r-- | sysdeps/arm/sys/ucontext.h | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/sysdeps/arm/sys/ucontext.h b/sysdeps/arm/sys/ucontext.h index f2cc43d341..09fe418b3c 100644 --- a/sysdeps/arm/sys/ucontext.h +++ b/sysdeps/arm/sys/ucontext.h @@ -37,42 +37,44 @@ typedef int greg_t; /* Container for all general registers. */ typedef greg_t gregset_t[NGREG]; +#ifdef __USE_MISC /* Number of each register is the `gregset_t' array. */ enum { R0 = 0, -#define R0 R0 +# define R0 R0 R1 = 1, -#define R1 R1 +# define R1 R1 R2 = 2, -#define R2 R2 +# define R2 R2 R3 = 3, -#define R3 R3 +# define R3 R3 R4 = 4, -#define R4 R4 +# define R4 R4 R5 = 5, -#define R5 R5 +# define R5 R5 R6 = 6, -#define R6 R6 +# define R6 R6 R7 = 7, -#define R7 R7 +# define R7 R7 R8 = 8, -#define R8 R8 +# define R8 R8 R9 = 9, -#define R9 R9 +# define R9 R9 R10 = 10, -#define R10 R10 +# define R10 R10 R11 = 11, -#define R11 R11 +# define R11 R11 R12 = 12, -#define R12 R12 +# define R12 R12 R13 = 13, -#define R13 R13 +# define R13 R13 R14 = 14, -#define R14 R14 +# define R14 R14 R15 = 15, -#define R15 R15 +# define R15 R15 }; +#endif /* Structure to describe FPU registers. */ typedef struct fpregset |