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authorJoey Ye <joey.ye@arm.com>2014-02-27 17:44:43 +0000
committerJoseph Myers <joseph@codesourcery.com>2014-02-27 17:44:43 +0000
commit7d92b78723848ae616709eb8f0191ea067025b18 (patch)
tree9aea24dcf073852560bd0d88dc8befd39c540603 /sysdeps/arm
parent2b7f4f2cada566fe5da5b9260b3ca7b21db2a7e6 (diff)
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Fix ARM NAN fraction bits.
Current ARM soft-float implementation is violating the RTABI
(http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d/IHI0043D_rtabi.pdf)
Section 4.1.1.1:

When not otherwise specified by IEEE 754, the result on an invalid
operation should be the quiet NaN bit pattern with only the most
significant bit of the significand set, and all other significand bits
zero.

This patch fixes it by setting _FP_NANFRAC_* to zero.

Ran make check test with -mfloat-abi=soft. No regression.

	* sysdeps/arm/soft-fp/sfp-machine.h (_FP_NANFRAC_S, _FP_NANFRAC_D)
	(_FP_NANFRAC_Q): Set to zero.
Diffstat (limited to 'sysdeps/arm')
-rw-r--r--sysdeps/arm/soft-fp/sfp-machine.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/sysdeps/arm/soft-fp/sfp-machine.h b/sysdeps/arm/soft-fp/sfp-machine.h
index 52a08b5298..32697fef44 100644
--- a/sysdeps/arm/soft-fp/sfp-machine.h
+++ b/sysdeps/arm/soft-fp/sfp-machine.h
@@ -21,9 +21,9 @@
 #define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
 #define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
 
-#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
-#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
-#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANFRAC_S		0
+#define _FP_NANFRAC_D		0, 0
+#define _FP_NANFRAC_Q		0, 0, 0, 0
 #define _FP_NANSIGN_S		0
 #define _FP_NANSIGN_D		0
 #define _FP_NANSIGN_Q		0