Remove sfi_* annotations from ARM assembly files.

This semi-mechanical patch removes all uses and definitions of the
sfi_breg, sfi_pld, and sfi_sp macros from various ARM-specific
assembly files.  These were only used by NaCl.

	* sysdeps/arm/sysdep.h
        (ARM_SFI_MACROS, sfi_breg, sfi_pld, sfi_sp): Delete definitions.

	* sysdeps/arm/__longjmp.S, sysdeps/arm/add_n.S
	* sysdeps/arm/addmul_1.S, sysdeps/arm/arm-mcount.S
	* sysdeps/arm/armv6/rawmemchr.S, sysdeps/arm/armv6/strchr.S
	* sysdeps/arm/armv6/strcpy.S, sysdeps/arm/armv6/strlen.S
	* sysdeps/arm/armv6/strrchr.S, sysdeps/arm/armv6t2/memchr.S
	* sysdeps/arm/armv6t2/strlen.S
	* sysdeps/arm/armv7/multiarch/memcpy_impl.S
	* sysdeps/arm/armv7/strcmp.S, sysdeps/arm/dl-tlsdesc.S
	* sysdeps/arm/memcpy.S, sysdeps/arm/memmove.S
	* sysdeps/arm/memset.S, sysdeps/arm/setjmp.S
	* sysdeps/arm/strlen.S, sysdeps/arm/submul_1.S:
        Remove all uses of sfi_breg, sfi_pld, and sfi_sp.

1 files changed, 2 insertions, 50 deletions

diff --git a/sysdeps/arm/sysdep.h b/sysdeps/arm/sysdep.h
index 990e636892..6d60c34df1 100644
--- a/sysdeps/arm/sysdep.h
+++ b/sysdeps/arm/sysdep.h
@@ -150,7 +150,6 @@
    second version uses it.  */
 # define LDST_INDEXED_NOINDEX(OP, R, T, X, Y)		\
 	add	T, X, Y;				\
-	sfi_breg T,					\
 	OP	R, [T]
 # define LDST_INDEXED_INDEX(OP, R, X, Y)		\
 	OP	R, [X, Y]
@@ -198,7 +197,7 @@
 #  define LDR_GLOBAL(R, T, SYMBOL, CONSTANT)				\
 	movw	T, #:lower16:SYMBOL;					\
 	movt	T, #:upper16:SYMBOL;					\
-	sfi_breg T, ldr R, [\B, $CONSTANT]
+	ldr	R, [T, $CONSTANT]
 # elif defined (ARCH_HAS_T2) && defined (PIC) && ARM_PCREL_MOVW_OK
 #  define LDR_GLOBAL(R, T, SYMBOL, CONSTANT)				\
 	movw	R, #:lower16:_GLOBAL_OFFSET_TABLE_ - 97f - PC_OFS;	\
@@ -212,7 +211,7 @@
 97:	add	R, R, pc;						\
 98:	LDST_PC_INDEXED (ldr, T, T, T);					\
 	LDST_INDEXED (ldr, R, T, R, T);					\
-	sfi_breg R, ldr	R, [\B, $CONSTANT]
+	ldr	R, [R, $CONSTANT]
 # else
 #  define LDR_GLOBAL(R, T, SYMBOL, CONSTANT)		\
 	ldr	T, 99f;					\
@@ -277,53 +276,6 @@
 	cfi_restore_state
 # endif /* ARCH_HAS_HARD_TP */
 
-# ifndef ARM_SFI_MACROS
-# define ARM_SFI_MACROS 1
-/* This assembly macro is prepended to any load/store instruction,
-   pulling the base register out of the addressing mode syntax and
-   making it the first operand of the macro.  For example:
-	ldr r0, [r1]
-   becomes:
-	sfi_breg r1, ldr r0, [\B]
-   The \B stands in for the base register that is the first operand
-   to the macro, so we can avoid error-prone repetition of the base
-   register in two places on the line.
-
-   This is used for all memory access through a base register other
-   than PC or SP.  It's intended to support SFI schemes such as
-   Native Client, where the OS will enforce that all load/store
-   instructions use a special form.  In any such configuration,
-   another sysdep.h file will have defined ARM_SFI_MACROS and
-   provided its own assembly macros with the same interface.  */
-
-        .macro sfi_breg basereg, insn, operands:vararg
-                .macro _sfi_breg_doit B
-                \insn \operands
-                .endm
-                _sfi_breg_doit \basereg
-                .purgem _sfi_breg_doit
-        .endm
-
-/* This assembly macro replaces the "pld" instruction.
-   The syntax:
-	sfi_pld REGISTER, #OFFSET
-   is exactly equivalent to:
-	sfi_breg REGISTER, pld [\B, #OFFSET]
-   (and ", #OFFSET" is optional).  We have a separate macro
-   only to work around a bug in GAS versions prior to 2.23.2,
-   that misparses the sfi_breg macro expansion in this case.  */
-
-	.macro sfi_pld basereg, offset=#0
-		pld [\basereg, \offset]
-	.endm
-
-/* This macro precedes any instruction that directly changes the SP.
-   It's not needed for push/pop or for any kind of load or store that
-   implicitly changes the SP via the ! syntax.  */
-# define sfi_sp	/* Nothing to do.  */
-
-# endif
-
 /* These are the directives used for EABI unwind info.
    Wrap them in macros so another configuration's sysdep.h
    file can define them away if it doesn't use EABI unwind info.  */