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| author | Wilco <wdijkstr@arm.com> | 2014-06-24 12:04:27 +0000 |
|---|---|---|
| committer | Wilco <wdijkstr@arm.com> | 2014-06-24 12:04:27 +0000 |
| commit | 001f7b773c637560ecfa686452a5e68d60d07db3 (patch) | |
| tree | 08bd670c6b892304a287c56f6cbeb00e92276567 /sysdeps/arm/feenablxcpt.c | |
| parent | 4841e6a6c2fa691201fb52dfaf6b6a8920229bac (diff) | |
| download | glibc-001f7b773c637560ecfa686452a5e68d60d07db3.tar.gz glibc-001f7b773c637560ecfa686452a5e68d60d07db3.tar.xz glibc-001f7b773c637560ecfa686452a5e68d60d07db3.zip | |
Speed up the ARM fenv implementation by avoiding unnecessary FPSCR
writes if the FPSCR remains unchanged. 2014-06-24 Wilco <wdijkstr@arm.com> * sysdeps/arm/fclrexcpt.c (feclearexcept): Optimize to avoid unnecessary FPSCR writes. * sysdeps/arm/fedisblxcpt.c (fedisableexcept): Likewise. * sysdeps/arm/feenablxcpt.c (feenableexcept): Likewise. * sysdeps/arm/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/arm/setfpucw.c (__setfpucw): Likewise.
Diffstat (limited to 'sysdeps/arm/feenablxcpt.c')
| -rw-r--r-- | sysdeps/arm/feenablxcpt.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/sysdeps/arm/feenablxcpt.c b/sysdeps/arm/feenablxcpt.c index afd8943638..f54ca6edf4 100644 --- a/sysdeps/arm/feenablxcpt.c +++ b/sysdeps/arm/feenablxcpt.c @@ -25,7 +25,7 @@ int feenableexcept (int excepts) { - fpu_control_t fpscr, new_fpscr; + fpu_control_t fpscr, new_fpscr, updated_fpscr; /* Fail if a VFP unit isn't present. */ if (!ARM_HAVE_VFP) @@ -35,15 +35,15 @@ feenableexcept (int excepts) excepts &= FE_ALL_EXCEPT; new_fpscr = fpscr | (excepts << FE_EXCEPT_SHIFT); - _FPU_SETCW (new_fpscr); - - if (excepts != 0) + if (new_fpscr != fpscr) { + _FPU_SETCW (new_fpscr); + /* Not all VFP architectures support trapping exceptions, so test whether the relevant bits were set and fail if not. */ - _FPU_GETCW (new_fpscr); - if ((new_fpscr & (excepts << FE_EXCEPT_SHIFT)) - != (excepts << FE_EXCEPT_SHIFT)) + _FPU_GETCW (updated_fpscr); + + if (new_fpscr & ~updated_fpscr) return -1; } |