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author | Wilco <wdijkstr@arm.com> | 2014-06-24 12:04:27 +0000 |
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committer | Wilco <wdijkstr@arm.com> | 2014-06-24 12:04:27 +0000 |
commit | 001f7b773c637560ecfa686452a5e68d60d07db3 (patch) | |
tree | 08bd670c6b892304a287c56f6cbeb00e92276567 /sysdeps/arm/fclrexcpt.c | |
parent | 4841e6a6c2fa691201fb52dfaf6b6a8920229bac (diff) | |
download | glibc-001f7b773c637560ecfa686452a5e68d60d07db3.tar.gz glibc-001f7b773c637560ecfa686452a5e68d60d07db3.tar.xz glibc-001f7b773c637560ecfa686452a5e68d60d07db3.zip |
Speed up the ARM fenv implementation by avoiding unnecessary FPSCR
writes if the FPSCR remains unchanged. 2014-06-24 Wilco <wdijkstr@arm.com> * sysdeps/arm/fclrexcpt.c (feclearexcept): Optimize to avoid unnecessary FPSCR writes. * sysdeps/arm/fedisblxcpt.c (fedisableexcept): Likewise. * sysdeps/arm/feenablxcpt.c (feenableexcept): Likewise. * sysdeps/arm/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/arm/setfpucw.c (__setfpucw): Likewise.
Diffstat (limited to 'sysdeps/arm/fclrexcpt.c')
-rw-r--r-- | sysdeps/arm/fclrexcpt.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/sysdeps/arm/fclrexcpt.c b/sysdeps/arm/fclrexcpt.c index cbf61a6f4a..31420ed3c7 100644 --- a/sysdeps/arm/fclrexcpt.c +++ b/sysdeps/arm/fclrexcpt.c @@ -24,7 +24,7 @@ int feclearexcept (int excepts) { - fpu_control_t fpscr; + fpu_control_t fpscr, new_fpscr; /* Fail if a VFP unit isn't present unless nothing needs to be done. */ if (!ARM_HAVE_VFP) @@ -32,11 +32,11 @@ feclearexcept (int excepts) _FPU_GETCW (fpscr); excepts &= FE_ALL_EXCEPT; + new_fpscr = fpscr & ~excepts; - /* Clear the relevant bits. */ - fpscr = (fpscr & ~FE_ALL_EXCEPT) | (fpscr & FE_ALL_EXCEPT & ~excepts); - - _FPU_SETCW (fpscr); + /* Write new exception flags if changed. */ + if (new_fpscr != fpscr) + _FPU_SETCW (new_fpscr); return 0; } |