Remove sfi_* annotations from ARM assembly files.

This semi-mechanical patch removes all uses and definitions of the
sfi_breg, sfi_pld, and sfi_sp macros from various ARM-specific
assembly files.  These were only used by NaCl.

	* sysdeps/arm/sysdep.h
        (ARM_SFI_MACROS, sfi_breg, sfi_pld, sfi_sp): Delete definitions.

	* sysdeps/arm/__longjmp.S, sysdeps/arm/add_n.S
	* sysdeps/arm/addmul_1.S, sysdeps/arm/arm-mcount.S
	* sysdeps/arm/armv6/rawmemchr.S, sysdeps/arm/armv6/strchr.S
	* sysdeps/arm/armv6/strcpy.S, sysdeps/arm/armv6/strlen.S
	* sysdeps/arm/armv6/strrchr.S, sysdeps/arm/armv6t2/memchr.S
	* sysdeps/arm/armv6t2/strlen.S
	* sysdeps/arm/armv7/multiarch/memcpy_impl.S
	* sysdeps/arm/armv7/strcmp.S, sysdeps/arm/dl-tlsdesc.S
	* sysdeps/arm/memcpy.S, sysdeps/arm/memmove.S
	* sysdeps/arm/memset.S, sysdeps/arm/setjmp.S
	* sysdeps/arm/strlen.S, sysdeps/arm/submul_1.S:
        Remove all uses of sfi_breg, sfi_pld, and sfi_sp.

2 files changed, 12 insertions, 20 deletions

diff --git a/sysdeps/arm/armv6t2/memchr.S b/sysdeps/arm/armv6t2/memchr.S
index c012d73d38..fb4dc8efa3 100644
--- a/sysdeps/arm/armv6t2/memchr.S
+++ b/sysdeps/arm/armv6t2/memchr.S
@@ -65,8 +65,7 @@ ENTRY(memchr)
 
 	@ Work up to an aligned point
 5:
-	sfi_breg r0, \
-	ldrb	r3, [\B],#1
+	ldrb	r3, [r0],#1
 	subs	r2, r2, #1
 	cmp	r3, r1
 	beq	50f		@ If it matches exit found
@@ -91,8 +90,7 @@ ENTRY(memchr)
 	movs	r3, #0
 
 15:
-	sfi_breg r0, \
-	ldrd 	r4,r5, [\B],#8
+	ldrd 	r4,r5, [r0],#8
 #ifndef NO_THUMB
 	subs	r6, r6, #8
 #endif
@@ -130,8 +128,7 @@ ENTRY(memchr)
 #endif
 
 21:  @ Post aligned section, or just a short call
-	sfi_breg r0, \
-	ldrb	r3,[\B],#1
+	ldrb	r3,[r0],#1
 #ifndef NO_THUMB
 	subs	r2,r2,#1
 	eor	r3,r3,r1	@ r3 = 0 if match - doesn't break flags from sub
diff --git a/sysdeps/arm/armv6t2/strlen.S b/sysdeps/arm/armv6t2/strlen.S
index 4795c54ae5..c72a1e73be 100644
--- a/sysdeps/arm/armv6t2/strlen.S
+++ b/sysdeps/arm/armv6t2/strlen.S
@@ -67,7 +67,7 @@
 	.text
 	.p2align 6
 ENTRY(strlen)
-	sfi_pld	srcin, #0
+	pld	[srcin, #0]
 	strd	r4, r5, [sp, #-8]!
 	cfi_adjust_cfa_offset (8)
 	cfi_rel_offset (r4, 0)
@@ -76,15 +76,14 @@ ENTRY(strlen)
 	bic	src, srcin, #7
 	mvn	const_m1, #0
 	ands	tmp1, srcin, #7		/* (8 - bytes) to alignment.  */
-	sfi_pld	src, #32
+	pld	[src, #32]
 	bne.w	.Lmisaligned8
 	mov	const_0, #0
 	mov	result, #-8
 .Lloop_aligned:
 	/* Bytes 0-7.  */
-	sfi_breg src, \
-	ldrd	data1a, data1b, [\B]
-	sfi_pld	src, #64
+	ldrd	data1a, data1b, [src]
+	pld	[src, #64]
 	add	result, result, #8
 .Lstart_realigned:
 	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
@@ -94,8 +93,7 @@ ENTRY(strlen)
 	cbnz	data1b, .Lnull_found
 
 	/* Bytes 8-15.  */
-	sfi_breg src, \
-	ldrd	data1a, data1b, [\B, #8]
+	ldrd	data1a, data1b, [src, #8]
 	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
 	add	result, result, #8
 	sel	data1a, const_0, const_m1	/* Select based on GE<0:3>.  */
@@ -104,8 +102,7 @@ ENTRY(strlen)
 	cbnz	data1b, .Lnull_found
 
 	/* Bytes 16-23.  */
-	sfi_breg src, \
-	ldrd	data1a, data1b, [\B, #16]
+	ldrd	data1a, data1b, [src, #16]
 	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
 	add	result, result, #8
 	sel	data1a, const_0, const_m1	/* Select based on GE<0:3>.  */
@@ -114,8 +111,7 @@ ENTRY(strlen)
 	cbnz	data1b, .Lnull_found
 
 	/* Bytes 24-31.  */
-	sfi_breg src, \
-	ldrd	data1a, data1b, [\B, #24]
+	ldrd	data1a, data1b, [src, #24]
 	add	src, src, #32
 	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
 	add	result, result, #8
@@ -143,13 +139,12 @@ ENTRY(strlen)
 
 .Lmisaligned8:
 	cfi_restore_state
-	sfi_breg src, \
-	ldrd	data1a, data1b, [\B]
+	ldrd	data1a, data1b, [src]
 	and	tmp2, tmp1, #3
 	rsb	result, tmp1, #0
 	lsl	tmp2, tmp2, #3			/* Bytes -> bits.  */
 	tst	tmp1, #4
-	sfi_pld	src, #64
+	pld	[src, #64]
 	S2HI	tmp2, const_m1, tmp2
 #ifdef NO_THUMB
 	mvn	tmp1, tmp2