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| author | Siddhesh Poyarekar <siddhesh@sourceware.org> | 2018-03-14 18:51:05 +0530 |
|---|---|---|
| committer | Siddhesh Poyarekar <siddhesh@sourceware.org> | 2018-03-14 18:51:05 +0530 |
| commit | d46f84de745db8f3f06a37048261f4e5ceacf0a3 (patch) | |
| tree | ec1632f0f01b35ab314022162318d43d323b32b5 /sysdeps/aarch64 | |
| parent | 7108f1f944792ac68332967015d5e6418c5ccc88 (diff) | |
| download | glibc-d46f84de745db8f3f06a37048261f4e5ceacf0a3.tar.gz glibc-d46f84de745db8f3f06a37048261f4e5ceacf0a3.tar.xz glibc-d46f84de745db8f3f06a37048261f4e5ceacf0a3.zip | |
aarch64/strncmp: Unbreak builds with old binutils
Binutils 2.26.* and older do not support moves with shifted registers, so use a separate shift instruction instead.
Diffstat (limited to 'sysdeps/aarch64')
| -rw-r--r-- | sysdeps/aarch64/strncmp.S | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/sysdeps/aarch64/strncmp.S b/sysdeps/aarch64/strncmp.S index 20c7ec8dad..1dc8b79a22 100644 --- a/sysdeps/aarch64/strncmp.S +++ b/sysdeps/aarch64/strncmp.S @@ -208,13 +208,15 @@ L(done): /* Align the SRC1 to a dword by doing a bytewise compare and then do the dword loop. */ L(try_misaligned_words): - mov limit_wd, limit, lsr #3 + mov limit_wd, limit + lsr limit_wd, limit_wd, #3 cbz count, L(do_misaligned) neg count, count and count, count, #7 sub limit, limit, count - mov limit_wd, limit, lsr #3 + mov limit_wd, limit + lsr limit_wd, limit_wd, #3 L(page_end_loop): ldrb data1w, [src1], #1 |