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author | Joe Ramsay <Joe.Ramsay@arm.com> | 2023-10-05 17:10:51 +0100 |
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committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2023-10-23 15:00:45 +0100 |
commit | 067a34156c19fb3c53824e37d70820c0ce5b87b2 (patch) | |
tree | c0e5649d7892db1a9fc195adc8b381c01ab77544 /sysdeps/aarch64/fpu/fsetexcptflg.c | |
parent | a8e3ab3074d448ff3e58ac8f850d955dfed830ad (diff) | |
download | glibc-067a34156c19fb3c53824e37d70820c0ce5b87b2.tar.gz glibc-067a34156c19fb3c53824e37d70820c0ce5b87b2.tar.xz glibc-067a34156c19fb3c53824e37d70820c0ce5b87b2.zip |
aarch64: Add vector implementations of log10 routines
A table is also added, which is shared between AdvSIMD and SVE log10.
Diffstat (limited to 'sysdeps/aarch64/fpu/fsetexcptflg.c')
0 files changed, 0 insertions, 0 deletions