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author | Steve Ellcey <sellcey@mips.com> | 2013-09-23 09:29:58 -0700 |
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committer | Steve Ellcey <sellcey@mips.com> | 2013-09-23 09:29:58 -0700 |
commit | 2487f2e6a565f5670feda65b8a1a6ac930ad36f1 (patch) | |
tree | 0afceaf36a6bd083cc9f0f550c8f2b6cc166fa21 /ports | |
parent | 303e567a8062200dc06acde7c76fc34679f08d8f (diff) | |
download | glibc-2487f2e6a565f5670feda65b8a1a6ac930ad36f1.tar.gz glibc-2487f2e6a565f5670feda65b8a1a6ac930ad36f1.tar.xz glibc-2487f2e6a565f5670feda65b8a1a6ac930ad36f1.zip |
2013-09-23 Steve Ellcey <sellcey@mips.com>
* sysdeps/mips/fpu_control.h (comments): Add capitalization and periods to match GNU standard.
Diffstat (limited to 'ports')
-rw-r--r-- | ports/ChangeLog.mips | 5 | ||||
-rw-r--r-- | ports/sysdeps/mips/fpu_control.h | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/ports/ChangeLog.mips b/ports/ChangeLog.mips index 84425c3ccc..c958f29285 100644 --- a/ports/ChangeLog.mips +++ b/ports/ChangeLog.mips @@ -1,3 +1,8 @@ +2013-09-23 Steve Ellcey <sellcey@mips.com> + + * sysdeps/mips/fpu_control.h (comments): Add capitalization and + periods to match GNU standard. + 2013-09-20 Steve Ellcey <sellcey@mips.com> * sysdeps/mips/memset.S: Change prefetching and add loop unrolling. diff --git a/ports/sysdeps/mips/fpu_control.h b/ports/sysdeps/mips/fpu_control.h index 40469627a7..a318ade9bc 100644 --- a/ports/sysdeps/mips/fpu_control.h +++ b/ports/sysdeps/mips/fpu_control.h @@ -71,21 +71,21 @@ extern fpu_control_t __fpu_control; #else /* __mips_soft_float */ -/* masking of interrupts */ +/* Masks for interrupts. */ #define _FPU_MASK_V 0x0800 /* Invalid operation */ #define _FPU_MASK_Z 0x0400 /* Division by zero */ #define _FPU_MASK_O 0x0200 /* Overflow */ #define _FPU_MASK_U 0x0100 /* Underflow */ #define _FPU_MASK_I 0x0080 /* Inexact operation */ -/* flush denormalized numbers to zero */ +/* Flush denormalized numbers to zero. */ #define _FPU_FLUSH_TZ 0x1000000 /* IEEE 754-2008 compliance control. */ #define _FPU_ABS2008 0x80000 #define _FPU_NAN2008 0x40000 -/* rounding control */ +/* Rounding control. */ #define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */ #define _FPU_RC_ZERO 0x1 #define _FPU_RC_UP 0x2 |