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author | Will Schmidt <will_schmidt@vnet.ibm.com> | 2012-08-21 14:20:55 -0500 |
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committer | Ryan S. Arnold <rsa@linux.vnet.ibm.com> | 2012-08-21 14:20:55 -0500 |
commit | 14a50c9d238a8d79d48193482ed9a2be52d1dc3d (patch) | |
tree | 046c03b3bf03143c65e3f4eab969391df13e4dd1 /ports/ChangeLog.tile | |
parent | 696da85994af013ae1e3e8ad3bb016793f9b2c5d (diff) | |
download | glibc-14a50c9d238a8d79d48193482ed9a2be52d1dc3d.tar.gz glibc-14a50c9d238a8d79d48193482ed9a2be52d1dc3d.tar.xz glibc-14a50c9d238a8d79d48193482ed9a2be52d1dc3d.zip |
[Powerpc] Tune/optimize powerpc{32,64}/power7/memchr.S.
Assorted tweaking, twisting and tuning to squeeze a few additional cycles out of the memchr code. Changes include bypassing the shift pairs (sld,srd) when they are not required, and unrolling the small_loop that handles short and trailing strings. Per scrollpipe data measuring aligned strings for 64-bit, these changes save between five and eight cycles (9-13% overall) for short strings (<32), Longer aligned strings see slight improvement of 1-3% due to bypassing the shifts and the instruction rearranging.
Diffstat (limited to 'ports/ChangeLog.tile')
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