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| author | Ulrich Drepper <drepper@redhat.com> | 2009-05-31 17:52:05 -0700 |
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| committer | Ulrich Drepper <drepper@redhat.com> | 2009-05-31 17:52:05 -0700 |
| commit | 963cb6fcb47ca212c0c57cc57bd7510f6549579c (patch) | |
| tree | e0b12d2f0af3a97193aaa12a7162e6c38b828a4f /nptl/tst-barrier1.c | |
| parent | fd469aac31dc09f1328c8c4b976f887ebd592c56 (diff) | |
| download | glibc-963cb6fcb47ca212c0c57cc57bd7510f6549579c.tar.gz glibc-963cb6fcb47ca212c0c57cc57bd7510f6549579c.tar.xz glibc-963cb6fcb47ca212c0c57cc57bd7510f6549579c.zip | |
Simplify CPUID value handling.
SO far Intel and AMD use exactly the same bits meaning the same things in CPUID index 1. Simplify the code. Should an architecture come along which doesn't use the same semantics then it must use a different index value than COMMON_CPUID_INDEX_1.
Diffstat (limited to 'nptl/tst-barrier1.c')
0 files changed, 0 insertions, 0 deletions