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authorH.J. Lu <hongjiu.lu@intel.com>2010-10-13 22:12:03 -0400
committerUlrich Drepper <drepper@gmail.com>2010-10-13 22:12:03 -0400
commitf90681487d90a6eea8f1c60021bc8dd83313c59b (patch)
tree79e5d816abda65fc72f4a163e552bdac4580deb6 /nptl/sysdeps
parentb833d51fbbf78b38c6ff68074c22d3fe3ddd0ce3 (diff)
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Fix alignment of AVX safe area on x86-64.
Diffstat (limited to 'nptl/sysdeps')
-rw-r--r--nptl/sysdeps/x86_64/pthreaddef.h5
-rw-r--r--nptl/sysdeps/x86_64/tls.h7
2 files changed, 4 insertions, 8 deletions
diff --git a/nptl/sysdeps/x86_64/pthreaddef.h b/nptl/sysdeps/x86_64/pthreaddef.h
index be63a8c74a..8ec135c048 100644
--- a/nptl/sysdeps/x86_64/pthreaddef.h
+++ b/nptl/sysdeps/x86_64/pthreaddef.h
@@ -27,8 +27,9 @@
 /* Minimal stack size after allocating thread descriptor and guard size.  */
 #define MINIMAL_REST_STACK	2048
 
-/* Alignment requirement for TCB.  */
-#define TCB_ALIGNMENT		16
+/* Alignment requirement for TCB.  Need to store post-AVX vector registers
+   in the TCB and we want the storage to be aligned at 32-byte.  */
+#define TCB_ALIGNMENT		32
 
 
 /* Location of current stack frame.  The frame pointer is not usable.  */
diff --git a/nptl/sysdeps/x86_64/tls.h b/nptl/sysdeps/x86_64/tls.h
index e39eb5f69d..41b5e6daa2 100644
--- a/nptl/sysdeps/x86_64/tls.h
+++ b/nptl/sysdeps/x86_64/tls.h
@@ -117,12 +117,7 @@ typedef struct
 # define TLS_TCB_SIZE sizeof (struct pthread)
 
 /* Alignment requirements for the TCB.  */
-//# define TLS_TCB_ALIGN __alignof__ (struct pthread)
-// Normally the above would be correct  But we have to store post-AVX
-// vector registers in the TCB and we want the storage to be aligned.
-// unfortunately there isn't yet a type for these values and hence no
-// 32-byte alignment requirement.  Make this explicit, for now.
-# define TLS_TCB_ALIGN 32
+# define TLS_TCB_ALIGN __alignof__ (struct pthread)
 
 /* The TCB can have any size and the memory following the address the
    thread pointer points to is unspecified.  Allocate the TCB there.  */